该协议是PCIe3.0协议完整版,介绍了PCIe的组成部分、工作原理有助于软件、硬件开发人员了解和应用PCIe
2019-12-21 18:55:09 4.98MB PCIe
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PCI Express Base Specification Revision 4.0 Version 1.0 September 27, 2017
2019-12-21 18:52:51 19.88MB PCIE PCI SPEC UEFI
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pcie_1.1_spec
2019-12-21 18:51:40 2.17MB pcie
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PCI Express Base Specification Revision 2.1
2019-12-21 18:50:49 4.1MB PCIE Express 2.0 SPEC
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这是Xilinx官方的PCie BMD例程的全部资料,最新,包括代码和说明PDF Please read XAPP1052 to undersand how to use the files in this zip file. 3. SOFTWARE TOOLS AND SYSTEM REQUIREMENTS 4. DESIGN FILE HIERARCHY Please see XAPP1052 for the file hierarchy of the zip file. 5. INSTALLATION AND OPERATING INSTRUCTIONS Please see XAPP1052 for detailed instructions on how to use the files in this repository.
2019-12-21 18:50:27 12.34MB Xilinx FPGA PCIe BMD
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PCIe协议规范打包下载 1.0 2.0 3.0
2019-12-21 18:49:46 8.7MB PCIe协议 规范 1.0 2.0
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PCIe 2.0协议规范,对PCIe接口的电气特性、机械特性以及PCIe协议的各层都进行了详细的说明和描述
2019-12-21 18:48:42 3.54MB PCIe
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PCI Express 3.0 is the latest generation of the popular peripheral interface found in virtually every PC, server, and industrial computer. Its high bandwidth, low latency, and cost-to-performance ratio make it a natural choice for many peripheral devices today. Each new generation of PCI Express adds more features, capabilities and bandwidth, which maintains its popularity as a device interconnect. MindShare's books take the hard work out of deciphering the specs, and this one follows that tradition. MindShare's PCI Express Technology book provides a thorough description of the interface with numerous practical examples that illustrate the concepts. Written in a tutorial style, this book is ideal for anyone new to PCI Express. At the same time, its thorough coverage of the details makes it an essential resource for seasoned veterans. 主要内容如下: PCI Express Origins Configuration Space and Access Methods Enumeration Process Packet Types and Fields Transaction Ordering Traffic Classes, Virtual Channels and Arbitration (QoS) Flow Control ACK/NAK Protocol Logical PHY (8b/10b, 128b/130b, Scrambling) Electrical PHY Link Training and Initialization Interrupt Delivery (Legacy, MSI, MSI-X) Error Detection and Reporting Power Management (for both software and hardware) 2.0 and 2.1 Features (such as 5.0GT/s, TLP Hints, and Multi-Casting) 3.0 Features (such as 8.0GT/s, and a new encoding scheme) Considerations for High Speed Signaling (such as Equalization)
2019-11-19 21:16:53 47.38MB mindshare pcie
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Bus Master DMA Performance Demonstration Reference Design for the Xilinx Endpoint PCI Express® Solutions
2014-08-06 00:00:00 3.83MB xilinx dma pcie BMD
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此书对pcie协议分析非常到位,简明清晰,是英文版,但非常值得一读!
2014-08-06 00:00:00 12.57MB pcie
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