PCIE-M2 V1.1规范,描述了M2的接口规范，尺寸标准，接口定义等标准，电气规范和socket接口位置等描述。

https://blog.csdn.net/u010872301/article/details/78519371?locationNum=8&fps=1 linux设备驱动之PCIE驱动开发 PCIE驱动开发（内含Makefile，直接编译即可使用） http://download.csdn.net/download/u010872301/10116259

PCIE协议2.0标准 目前的很多存储，传输都会用到， 1.1版本的已经有些老了，现在2.0的各家都开始大规模的支持

VITA_42_3 XMC TO PCIE协议文档 ,对于xmc转pcie接口具有参考价值。

PC装苹果系统用的网卡驱动，，不代表所有电脑哦！！

PCIE_3.0简介及信号和协议测试方法

PCIE接口标准，PCI Express Card Electromechanical Specification Revision 3.0

包括 TI-RTOS PCIe SYS/BIOS SPI UART EMIF I2C HyperLink GPIO的用户手册

处理层（transaction Layer specification）是请求和响应信息形成的基础。包括四种地址空间，三种处理类型，一类是对i/o口和memory的读写包（TLPS：transaction Layers packages），另一类是对配置寄存器的读写设置包，还有一类是信息包，描述通信状态，作为事件的信号告知用户。

OBJECTIVE OF THE SPECIFICATION.................................................................................... 27 DOCUMENT ORGANIZATION ................................................................................................ 27 DOCUMENTATION CONVENTIONS...................................................................................... 28 TERMS AND ACRONYMS........................................................................................................ 29 REFERENCE DOCUMENTS...................................................................................................... 36 1. INTRODUCTION ................................................................................................................ 37 1.1. A THIRD GENERATION I/O INTERCONNECT ................................................................... 37 1.2. PCI EXPRESS LINK......................................................................................................... 39 1.3. PCI EXPRESS FABRIC TOPOLOGY .................................................................................. 41 1.3.1. Root Complex........................................................................................................ 41 1.3.2. Endpoints .............................................................................................................. 42 1.3.3. Switch.................................................................................................................... 45 1.3.4. Root Complex Event Collector.............................................................................. 46 1.3.5. PCI Express to PCI/PCI-X Bridge........................................................................ 46 1.4. PCI EXPRESS FABRIC TOPOLOGY CONFIGURATION....................................................... 46 1.5. PCI EXPRESS LAYERING OVERVIEW.............................................................................. 47 1.5.1. Transaction Layer..................................