本文设计了一款支持 PD3.0 的 E-Mark 芯片中的发送端（Transmitter, TX）
部分，它的主要作用是传输 Biphase Mark Coding（BMC）信号，协议中对输出
的信号的斜率及输出的高低电平的范围有严格的要求，并且对 TX 部分电路在奈
奎斯特频率下的输出阻抗的范围作了限制。
2021-06-17 18:04:24
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1、用于USB协议的学习。
2、PDIUSBD12配合STC15W408AS，加上TM1650的按键扫描功能实现鼠标基本功能。
3、资源内部含有USB学习板的PCB工程（AD），与驱动源码程序（KEIL）,和一些USB相关的资料。
4、代码和板子均经过测试，可以正常工作。
2021-06-01 18:02:45
54.97MB
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Acknowledgement of USB 3.0 Technical Contribution
1 Introduction
1.1 Motivation.................................................................................................................1-1
1.2 Objective of the Specification...................................................................................1-2
1.3 Scope of the Document............................................................................................1-2
1.4 USB Product Compliance.........................................................................................1-2
1.5 Document Organization............................................................................................1-3
1.6 Design Goals............................................................................................................1-3
1.7 Related Documents..................................................................................................1-3
2 Terms and Abbreviations
3 SuperSpeed USB Architectural Overview
3.1 USB 3.0 Overview....................................................................................................3-1
3.1.1 SuperSpeed Architecture Overview........................................................3-2
3.1.1.1 Physical Layer.................................................................3-2
3.1.1.2 Link Layer........................................................................3-3
3.1.1.3 Protocol Layer.................................................................3-3
3.1.1.4 Hubs................................................................................3-4
3.1.1.5 Power Management........................................................3-5
3.2 USB 3.0 System.......................................................................................................3-5
3.2.1 Comparing SuperSpeed USB to USB 2.0 ..............................................3-5
3.2.2 System Level Topology ..........................................................................3-7
3.2.
2021-05-12 11:36:11
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