FPGA EP2C8Q208_FT245BM_TFP401A_BCM5421S protel设计硬件硬件原理图+PCB+FPGA设计源码,硬件4层板设计,大小为114x128mm,Protel 99se 设计的DDB后缀项目工程文件,包括完整无误的原理图和PCB印制板图,已经在项目中使用,可用Protel或 Altium Designer(AD)软件打开或修改,可作为你产品设计的参考。 核心器件如下:
Library Component Count : 52
Name Description
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0006
24LC21LA/SN
4 HEADER
HEADER 4
5208
8 HEADER
HEADER 8
93C46
AOZ1010AI
AT24C01A/02
AT45DB041B-S U?
BCM5421S GBIT-CHIP
CAP Capacitor
CAP-VD
CON2
CON3 Connector
CON4 Connector
CON6 Connector
DIANGAN
DIODE SCHOTTKY2 Schottky Diode
DIP_XTAL
DS18B20 Q?
DVI_PLUG
ELECTRO1
ELECTROS-VD
EP2C8Q208
EPCS4
FPGA_P_AS
FT245BM
HEADER 2
HEADER 8X2
HY57V653220
INDUCTOR1
INDUCTOR2
JTAG
LED
LED-VD
MAGNETIC
NPN NPN Transistor
RES1
RES2
RES3-VD
RES4
RES4-VD
RESPACK4B-VD
SLDS119A
SW-PB
SWPB-VD
USB_B
XTAL2-VD
XTAL4-VD
配套的cyclone2 FPGA Verilog源码文件(非工程文件)如下:
alt_pll.bsf
alt_pll.v
alt_ram_1024_24.v
alt_ram_512_8.bsf
alt_ram_512_8.v
clk_test.v
data_test.v
deal_int.v
dvi_ram.bsf
dvi_ram.v
dvi_receive.v
dvi_receive.v.bak
dvi_test.v
init_bcm5421.v
init_set.v
Led_Ctrl_SV1.v
mii_man_cnt.v
query_link_state.v
rec_pro_test.v
report_face_t.v
rx_t_2.v
sdram_addr_test.v
sdram_data_test.v
sdram_init.v
sdram_test_top.v
temp.bsf
temp.v
tx_t_1.v
usb_ctl.v
usb_interface.v
usb_phy_rx.v
usb_phy_tx.v
vd3033_t.v