Maxim Integrated能够为您的Altera PFGA设计提供电源、信号转换、IP保护和高速DAC/ADC等所需器件。通过这本产品指南,您可以详细了解我们的产品如何简化、改进您的设计,以及如何解决设计中遇到的问题。
2023-11-29 22:00:15 8.39MB FPGA模拟方案
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Altera FPGA/CPLD设计 基础篇-高级篇(第2版)。
2022-04-07 10:15:50 82.93MB fpga alterafpga
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Pin-out Cyclone IV EP4CE22
2022-01-24 17:00:25 108KB cycloneiV alterafpga ep4ce22 out
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5款ALTERA FPGA,CPLD 开发板原理图合集,5款ALTERA FPGA,CPLD 开发板原理图合集
2021-08-23 13:16:46 653KB ALTERAFPGA FPGA
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基于FPGA等精度测频算法实现的高精度频率计,本人亲测通过,控制为51单片机。
2021-04-26 10:08:33 872KB FPGA quartusII 测频 频率计
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EP2C35F672C8+SDRAM 官方FPGA开发板 核心板ALTIUM设计硬件原理图PCB+AD集成封装库,8层板设计,大小为112x80mm,Altium Designer 设计的工程文件,包括完整的原理图及PCB文件,可以用Altium(AD)软件打开或修改,可作为你产品设计的参考。集成封器件型号列表: Library Component Count : 20 Name Description ---------------------------------------------------------------------------------------------------- CAP-NP Capacitor, Ceramic, 2.2uF 10% 10V 0603 (1608) X5R CAP-P Capacitor, Tantalum, 220uF 10% 10V MCCT-D (7343-31) CON-DOCKSTAT-100-M-STRConnector, Molex Docking Station 100 Pin Male 54075 DIO-LED-1S LED, Red 0805 (2013) HSMH-C170 DS2406 Dual Addressable Switch Plus 1KB Memory EP2C35F672C8 FPGA, Altera Cyclone2-35 F672 IND-FER Inductor, Ferrite Bead 1K@100MHz 300mA 0805 (2012) BMB2A1000LN2 IND-IRON-DOT Inductor, 2.2uH, 15A, 4R2, SMD K6R4016V1D-T K6R4016V1D-TC10T, 256K x 16-Bit SRAM, TSOP44 Logo-Altium Altium Logo for PCB MAX1831-ALT MAX1831EEE, 3A, 1MHz, Low-Voltage, Step-Down Regulators with Synchronous Rectification and Internal Switches MOUNTING_HOLE_3MM Mounting Hole, M3 Screw, Plated, Square Pad MT48LC16M16A2TG MT48LC16M16A2TG, 256 Mbit High-Speed CMOS SDRAM, 16Mb x 16Bit x 4 Banks, TSOP54 NETTIE-SMT2 Net-Tie, Surface Mount, 2 x 0.4mm x 0.2mm SMT Pads - For 0.2mm Track PCB-BARE DB31 Blank PCB - Daughter Board Altera Cyclone2 EP2C35F672C8 RES Resistor, 4K7 1% 0402 (1005) RES-NET-IND-4-SMD Resistor Network, Isolated, 4 x 100R, 5%, SMD 0402 x 4 S29GL256NF S29GL256N11FFIV10, 256 Megabit (16M x 16) 3.0V Page Mode Flash Memory SN74LVC1G04DBV SN74LVC1G04DBV, Single Inverter Gate, 1.65-V to 5.5-V TestPin Test Point, PCB Mount with Silkscreen Box
CYCLONE4 EP4CE10F17C 新起点FPGA开发板Verilog 设计Quartus II工程40个例程源码,包括: 0_uart_top 11_vga_colorbar 12_vga_blockmove 13_vga_char 14_vga_rom_pic 15_lcd_rgb_colorbar 16_lcd_rgb_char 17_top_remote_rcv 18_temp_disp 19_top_dht11 1_flow_led 20_top_cymometer 21_e2prom_top 22_ap3216c_top 23_rtc 24_sdram_rw_test 25_ov7725_rgb565_640x480_vga 26_ov7725_rgb565_640x480_lcd 27_ov5640_rgb565_1024x768_vga 28_ov5640_rgb565_lcd 29_top_sd_rw 2_key_led 30_top_sd_photo_vga 31_top_sd_photo_lcd 32_top_traffic 33_hs_ad_da 34_hs_dual_da 35_hs_dual_ad 36_ov5640_rgb565_yuv_vga 37_ov5460_img_binarization 38_median_filter 39_sobel_edge_dector 3_top_key_beep 40_digital_recognition 41_dual_ov5640_vga 42_dual_ov5640_lcd 4_touch_led 5_seg_led_static_top 6_seg_led_dynamic 7_ip_pll 8_ip_ram 9_ip_fifo FPGA开发板原理图.pdf
Altera FPGA 全速漂移 开发指南,
2021-03-12 12:01:59 21.89MB AlteraFPGA
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详细的截图与仿真代码,总结应用FPGA简单双口RAM+真双口RAM
2019-12-21 22:21:51 917KB alteraFPGA 双口RAM 仿真测试 源码
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