本文介绍了基于ZynqSoC的PMSM驱动控制系统，该控制系统使用ARM和FPGA相结合的形式实现了高性能、高集成度的控制算法。本系统中FPGA部分实现了计算并行度高、计算性能要求高的PMSM电流环矢量控制算法，ARM部分实现了可移植性强、算法种类多的速度控制算法、位置控制算法等。

XC7Z020CLG484 XILINX FPGA开发板ALTIUM原理图+PCB【12层】工程文件, 板子大小为121*119mm，12层板设计，可以做为你的学习设计参考，主要器件如下： Library Component Count : 70 Name Description ---------------------------------------------------------------------------------------------------- AND_Gate_TI_SN74AUP1T08DCKRIC GATE POS-AND SLG 2INP SC70-5 Balun_AnarenB0322J5050AHFUltra Low Profile 0805 Balun, 50 ohm unbalanced to 50 Balanced BarrelJack CONN PWR JACK 0.8X3.35MM SMT Buffer_74LCX126 74LCX126BQX, quad buffer, LV N-Inv, DQFN14 Buffer_Fairchild_NC7SZ125NC7SZ125M5X, Tri-State Buffer UHS, SOT-23 Buffer_Fairchild_NCWZ07NC7WZ07, dual non-inverting buffer, SC-70-6 (SOT-363) Bus_Repeat_TI_PCA9515APWRIC DUAL BIDIR BUS REPEAT 8-TSSOP CAP_0201 Generic Capacitor CAP_0402 10000pF, ceramic, 10% 6.3V X5R, 0402 CAP_0603 4.7uF, ceramic, 10% 6.3V X5R Low ESR, 0603 CAP_0805 22uF, ceramic, 20%, 6.3V, X5R, 0805 CAP_1206 CAP CER 100UF 6.3V 20% X5R 1206 CAP_1210 22uF, ceramic, 20% 25V X7R, 1210 COM-UART-FT4232H-QFN64IC USB HS QUAD UART/SYNC 64-QFN Cap Pol1 100uF, tantalum, 20% 10V, 1210 DDR3_MICRON_MT41J128M16HA-15EDMT41J128M16HA-15E:D, DDR3 SDRAM 4Gb x4, x8, x16, FBGA96 Diode DIODE 30V 1A SMINI2 EEPROM_Microchip_93LC56BT_IOT93LC56BT-I/OT, EEPROM 2Kbit 3MHz, SOT23-6 EthernetPHY_TI_DP83865DVHEthernet PHY_TI_DP83865DVH, Gigabit Ethernet PHYTER,128 Lead Plastic Flat Pack FerriteBead Ferrite 300mA 600ohm 0402 FerriteBead0805 MPZ2012S601A, 600 ohm, 100MHz, 0805 Fiducial GPSReceiver_Skyworks_SE4110LHigh sensitivity / low power GPS and A-GPS,10 mA operating current with 2.7-3.3 V supply GigabitTransformer_H6062NLTMagnetics, GigabitTransformer, H6062NLT, Pulse Header-2_milmax CONN HEADER 2POS .100" HORIZ SMD Header-6_PMOD CONN FEMALE 6POS .100" R/A TIN Header-8_PoE CONN HEADER 8POS DUAL SHRD SMD Header_Harwin_M50-3600842CONN HDR 1.27MM SMD AU 16POS INDUCTOR INDUCTOR, 1

XC7Z020CLG484开发板原理图，PCB，库都可以用AD打开，说明清楚全网正宗