TetraMax documentation/introduction

Tetramax指南文档，英文文档，用于atpg，dft设计使用。 In this tutorial, usage of Tetramax to generate test patterns will be discussed. As it is used with other tools such as VCS compiler, simulator, and Design Compiler, the scripts for their use or the basic procedures will be discussed as well. Therefore, the discussion will include:  How VCS will be used to simulate a design (Full adder) written in verilog with the help of test bench.  Test patterns will be generated for the given design  Design Compiler is used to synthesize the design using a script  Test Patterns are generated using TetraMax for the synthesized circuit.  VCS will be used to test the synthesized design whether it can pass the tests from all the patterns generated to detect faults.

TetraMAX ATPG Quick Reference ATPG工具

TetraMAX ® ATPG User Guide Version L-2016.03-SP2, June 2016 The TetraMAX ATPG User Guide describes TetraMAX ATPG usage and methodology. TetraMAX ATPG is used to check testability design rules and to automatically generate manufacturing test vectors for a logic design. This manual provides some background material on design-for-test (DFT) cone timepts, especially test terminology and scan design techniques. You can obtain more information on TetraMAX ATPG features and commands by accessing TetraMAX Help.

最新的Synopsys TetraMAX User　Guide, chm格式 方便查找使用.

本文档在充分分析DFT原理的基础上，根据本人专心研究，总结出DFT设计流程，仅供参考！

很好的DFT TetraMAX的培训文章