包含SystemVerilog的图书SystemVerilog for Verification(第3版)以及最新版IEEE标准;SystemVerilog Assertions的图书A Practical Guide for SystemVerilog Assertions;UVM1.2源码、官方手册、最新版IEEE标准以及图书A practical guide to adopting the universal verfication methodology(UVM)。
Eduard Cerny, Surrendra Dudani, John Havlicek, Dmitry Korchemny (auth.) - SVA_ The Power of Assertions in SystemVerilog-Springer International Publishing (2015)
Ashok B. Mehta (auth.) - SystemVerilog Assertions and Functional Coverage_ Guide to Language, Methodology and Applications-Springer International Publishing
非常好的学习验证的中文资料,尤其是assertion 。极力推荐。