MIPI 联盟 SPMI system power management interface 学习总结, 用于连接PMIC和SOC

This SPMI Specification defines the operating states, the command set, the physical interface, and the protocol data communication between SPMI devices on a SPMI bus to insure the compatibility of command and data transfers. The SPMI Command Sequence set includes Slave and Master addressing, control of the Slave operating state, register read from and register write to Master and Slave devices, as well as commands supporting the use of MIPI Device Descriptor Block data read and bus management.

This document is a Draft MIPI Specification. MIPI member companies’ rights and obligations apply to this Draft MIPI Specification as defined in the MIPI Membership Agreement and MIPI Bylaws. An updated Frequently Asked Questions (FAQ) document has been prepared by the SPM Working Group for SPMI v2.0 Specification implementers. Also, a SPMI v2.0 Protocol Implementation Conformance Statement (PICS) document has been prepared by the SPM Working Group. The SPMI v2.0 Specification contains the following major changes with respect to SPMIv1.0: • Unified memory map for Slave Device. • Command acknowledgement (ACK/NACK) for Write commands where required. • System behavior upon detection of a parity error in an RCS Device-initiated Command Frame.

SPMI协议理解文档，可以帮助快速理解SPMI，典型应用(Qcom PMIC/PMI)。