This application note describes the procedure used within the Timing and Synchronization (TSD) division of IDT to analyze the PSNR for its devices. Power supply noise rejection (PSNR) is a measurement of how well a circuit rejects noise from various frequencies which are coupled into the power supply. In actual high speed analog and digital circuitry, the power supply pins are vulnerable to random noise Most customer designs use linear voltage regulators or switching voltage regulators as the power supply for ICs. Linear regulators will almost always get input voltage from a switching DC/DC converter. Therefore, power supply noises in a customer board typically come from the switching noise of the power supply and coupling from other high-frequency sections of the circuit board. Many of the problems facing PCB designers today are related to power supply noise. There are guidelines that can be used to solve simple issue. For more complex issues, a better understanding and consideration of all the parameters will be required to provide a clean solution. For this reason, it is essential to understand the PSNR of the clock devices. This can assist in designing the correct bypassing and decoupling for the system.