This document defines the LPDDR2 standard, including features, functionalities, AC and DC
characteristics, packages, and ball/signal assignments. This standard covers the following technologies:
LPDDR2-S2A, LPDDR2-S2B, LPDDR2-S4A, LPDDR2-S4B, LPDDR2-N-A, and LPDDR2-N-B. The
purpose of this standard is to define the minimum set of requirements for JEDEC compliant 64 Mb through
8 Gb for x8, x16, and x32 SDRAM devices as well as 64 Mb through 32 Gb for x8, x16, and x32 for NVM
devices. This document was created using aspects of the following standards: DDR2 (JESD79-2), DDR3
(JESD79-3), LPDDR (JESD209), and LPDDR-NVM (N07-NV1A). Each aspect of the standard was
considered and approved by committee ballot(s). The accumulation of these ballots were then
incorporated to prepare the LPDDR2 Standard.
2025-12-04 23:03:46
3.87MB
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MT6589_EMMC_LPDDR2_WGPTG_V0.02 原理图和PCB（PADS格式）
2022-02-26 14:49:05
2.98MB
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瑞芯微RK3288核心板官方参考设计资料（包括Cadence allegro LPDDR2 DDR3设计原理图+PCB+硬件设计说明文档）：
K3PE7E00QM-BGC2_216F_12x12_R10.pdf
RK3288-DDR3P416SD6-V13-20140619HJH
RK3288-DDR3P416SS6-V12-20140619HJH
RK3288-LPDDR2AP232SD6-V12-20140619LGL
RK3288-LPDDR2AP232SD6-V22-20140620LGL
RK3288-LPDDR2BP132SD6-V10-20140821LJ
RK3288-LPDDR2BP132SD6-V10-20140821LJ.rar
RK3288-LPDDR2CP132SS6-V15-20140623HJH
RK3288-LPDDR3P232SD6-V12-20140623HXS
RK3288-LPDDR3P232SD6-V22-20140623J
SDK模板列表_RK3288(更新至20140922).xls
SEC_K3PE0E00_Datasheet_Ver.1.00.00_Final for Common.pdf
2021-06-28 21:03:23
15.64MB
MTK联发科MT6589_EMMC_LPDDR2某米手机主板 PADS9.5设计硬件原理图PCB工程文件，包括完整的原理图和PCB文件，可以做为你的设计参考。
2021-03-22 16:08:06
4.19MB
联发科MT6589_EMMC_LPDDR2_WG PADS软件设计手机底板硬件原理图+PCB文件，采用10层板设计，PADS设计的工程文件，包括完整的原理图及PCB文件，可以用PADS软件打开或修改，可作为你产品设计的参考。
2021-02-02 12:38:25
4.19MB