JESD21-C 中关于DDR3 硬件设计参考,比如时钟端接等
2022-09-30 10:54:27 2.81MB 嵌入式硬件 DDR3 JESD21-C 端接
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JESD21-C: Table of Contents,这是一个目录,列了所有JESD21-C相关文档的索引。此文档在http://www.jedec.org/也可下载,只是得找找。此文档可以查到段号或文档编号,方便查找文档。
2022-04-30 16:45:29 190KB JESD21-C目录
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JESD21-C, JEDEC Configurations for Solid State Memories, is a compilation of some 3000 pages of all memory device standards for solid state memory including DIMM, DRAM, SDRAM, MCP, PROM, and others from September 1989 to present. The JEDEC JC-42 Committee on RAM Memory and its Subcommittees, JC-45 Committee on Memory Modules and its Subcommittees and the JC-63 Committee on Multi Chip Packages develop the standards in JESD21-C and are responsible for updating the publication. An annual updating service for JESD21 is available by subscription. Subscribers receive periodic electronic updates for replacement or insertion into the hard copy JESD21-C. A complete hard copy of JESD21-C is available for purchase. The hard copy comes in two 3” wide 3-ring binders so that future updates can be added with ease.
2021-10-27 17:39:20 7.01MB Memory Configurations JESD21-C JEDEC
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