This specification describes a serialized interface between data converters and logic devices. It contains normative information to enable designers to implement devices that communicate with other devices covered by this specification. Informative annexes are included to clarify and exemplify the specification. Due to the range of applications involved, the intention of the document is to completely specify only the serial data interface and the link protocol. Certain signals common to both the interface and the function of the device, such as device clocks and control interfaces, have application-dependent requirements. Devices may also have application-dependent modes, such as a low power / shutdown mode that will affect the interface. In these instances, the specification merely constrains other device properties as they relate to the interface, and leaves the specific implementation up to the designer. Revision A of the standard was expanded to support serial data interfaces consisting of single or multiple lanes per converter device. In addition, converter functionality (ADC or DAC) can be distributed over multiple devices:
2024-08-28 14:40:46 4.58MB JESD204C
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JESD204B 以及JESD204C协议规范 pdf
2022-05-18 14:30:29 96.23MB JESD204B JESD204C
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官方标准协议,各家厂商都遵循,FPGA设计实现必看说明,有需要的欢迎下载,欢迎交流.
2022-05-13 14:49:50 4.58MB JESD
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JESD204C协议标准,兼容204B协议,对于通信专业的童鞋非常重要
2022-02-27 14:06:37 4.17MB 204C 协议 jedec
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本压缩包是JEDEC全球固态技术协会官网下载的JESD204B和JESD204C协议两份说明书。 JESD204B协议说明书现在在官网上搜索不到,需要用旧链接才能找到下载地址。
2021-07-21 10:23:12 5.07MB JESD204B JESD204C
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JESD204B和204C中英双语 协议 pdf
2021-07-08 22:34:18 17.96MB JESD204B
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JESD204C英文标准协议
2021-03-30 09:03:42 7MB JESD204C英文标准协议
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JESD204C 协议规范,正版资料,最新标准,欢迎下载~~~~
2019-12-21 21:51:41 4.58MB 标准
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