1 (Kluwer) Principles of Verifiable RTL Design (2nd Ed.)
2 (Kluwer) Writing Testbenches--Functional Verification of HDL Models
3 A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog
4 Advanced.ASIC.Chip.Synthesis.2nd.Edition
5 Reuse.Methodology.Manual.3rd.Edition
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