MY-FPGA-EP1C3开发套件概述，有关FPGA开发板的一些详细说明

本项目通过综合使用三轴加速度传感器、数码管、蜂鸣器、导航键、按键、振动传感器等元件，基于上位机与下位机之间的通信和数据交互，利用下位机完成对上位机游戏——贪吃蛇的多种方式控制。

Altera Cyclone 全系列原理图库+PCB封装库（AD集成库），.IntLib后缀文件，拆分后文件为PcbLib+SchLib格式，Altium Designer原理图库+PCB封装库，集成库型号列表如下： Library Component Count : 144 Name Description ---------------------------------------------------------------------------------------------------- EP1C12F256C6 Cyclone Family, 1.5V FPGA, 185 I/O Pins, 2 x PLLs, Commercial Grade, Speed Grade 6 EP1C12F256C6N Cyclone Family, 1.5V FPGA, 185 I/O Pins, 2 x PLLs, Commercial Grade, Speed Grade 6, Pb-Free EP1C12F256C7 Cyclone Family, 1.5V FPGA, 185 I/O Pins, 2 x PLLs, Commercial Grade, Speed Grade 7 EP1C12F256C7N Cyclone Family, 1.5V FPGA, 185 I/O Pins, 2 x PLLs, Commercial Grade, Speed Grade 7, Pb-Free EP1C12F256C8 Cyclone Family, 1.5V FPGA, 185 I/O Pins, 2 x PLLs, Commercial Grade, Speed Grade 8 EP1C12F256C8N Cyclone Family, 1.5V FPGA, 185 I/O Pins, 2 x PLLs, Commercial Grade, Speed Grade 8, Pb-Free EP1C12F256I6 Cyclone Family, 1.5V FPGA, 185 I/O Pins, 2 x PLLs, Industrial Grade, Speed Grade 6 EP1C12F256I6N Cyclone Family, 1.5V FPGA, 185 I/O Pins, 2 x PLLs, Industrial Grade, Speed Grade 6, Pb-Free EP1C12F256I7 Cyclone Family, 1.5V FPGA, 185 I/O Pins, 2 x PLLs, Industrial Grade, Speed Grade 7 EP1C12F256I7N Cyclone Family, 1.5V FPGA, 185 I/O Pins, 2 x PLLs, Industrial Grade, Speed Grade 7, Pb-Free EP1C12F256I8 Cyclone Family, 1.5V FPGA, 185 I/O Pins, 2 x PLLs, Industrial Grade, Speed Grade 8 EP1C12F256I8N Cyclone Family, 1.5V FPGA, 185 I/O Pins, 2 x PLLs, Industrial Grade, Speed Grade 8, Pb-Free EP1C12F324C6 Cyclone Family, 1.5V FPGA, 249 I/O Pins, 2 x PLLs, Commercial Grade, Speed Grade 6 EP1C12F324C6N Cyclone Family, 1.5V FPGA, 249 I/O Pins, 2 x PLLs, Commercial Grade, Speed Grade 6, Pb-Free EP1C12F324C7 Cyclone Family, 1.5V FPGA, 249 I/O Pins, 2 x PLLs, Commercial Grade, Speed Grade 7 EP1C12F324C7N Cyclone Family, 1.5V FPGA, 249 I/O Pins, 2 x PLLs, Commercial Grade, Speed Grade 7, Pb-Free EP1C12

TMS320F28335+EP1C3+PL2303H+LM2596 AD设计硬件原理图PCB[4层]文件，包括完整的原理图PCB文件,板子大小为238x80mm,4层板。可用PAltium Designer(AD)软件打开或修改，已经制板验证使用，可作为你产品设计的参考。

DSP(TMS320F28335)+FPGA(EP1C3)开发板protel硬件原理图+PCB文件，，采用4层板设计，板子大小为238x80mm，双面布局布线，DSP选用TI的TMS320F28335作为核心控制部件，FPGA选用ALTERA公司的CYCLOEN系列中的EP1C3T144C8芯片，USB转串口芯片选用PL-2303HXD，OLED显示屏选用M00538。Protel 99se 设计的DDB后缀项目工程文件，包括完整无措的原理图及PCB印制板图，可用Protel或 Altium Designer(AD)软件打开或修改，已经制板并在实际项目中使用，可作为你产品设计的参考。