MIL-HDBK-217F, Notice 1 is issued to correct minor typographical errors in the basic F Revision. MIL
HDBK-217F(base document) provides the following changes based upon recently completed studies
(see Ret 30 and 32 listed in Appendix C)
1. New failure rate prediction models are provided for the following nine major classes of
microcircuits
Monolithic Bipolar Digital and Linear Gate/Logic Array Devices
Monolithic MOS Digital and Linear Gate/Logic Array Devices
Monolithic Bipolar and MOS Digital Microprocessor Devices(Including Controllers
Monolithic Bipolar and Mos Memory Devices
Monolithic GaAs Digital Devices
Monolithic GaAs MMIC Devices
Hybrid Microcircuits
Magnetic Bubble Memories
Surface Acoustic Wave Devices
This revision provides new prediction models for bipolar and Mos microcircuits with gate counts up to
60,000, linear microcircuits with up to 3000 transistors, bipolar and Mos digital microprocessor and co-
processors up to 32 bits, memory devices with up to 1 million bits, GaAs monolithic microwave integrated
circuits(MMICs)with up to 1,000 active elements, and GaAs digital ICs with up to 10,000 transistors. The
C, factors have been extensively revised to reflect new technology devices with improved reliability, and
the activation energies representing the temperature sensitivity of the dice(IT)have been changed for
MOS devices and for memories. The Ca factor remains unchanged from the previous Handbook version,
but includes pin grid arrays and surlace mount packages using the same model as hermetic, solder-sealed
dual in-line packages. New values have been included for the quality factor (o), the learning factor(i,
and the environmental factor(aE). The model for hybrid microcircuits has been revised to be simpler to
use, to delete the temperature dependence of the seal and interconnect fallure rate contributions, and to
provide a method of calculating chip junction temperatures
2. A new model for Very High Speed Integrated Circuits(VHSIC/HSIC Like)and very
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