CYCLONE4 EP4CE10F17C 新起点FPGA开发板 PDF原理图
2021-03-14 18:06:03
2.66MB
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CYCLONE4 EP4CE10F17C 新起点FPGA开发板 Nios_II 工程15个例程 源码，包括：
10_qsys_gui_dotline
11_qsys_gui_picture
12_qsys_ucosii_hello
13_qsys_ucosii_task_time
14_qsys_ucosii_sem
15_qsys_ucosii_mail_msg
1_qsys_hello_world
2_qsys_pio
3_qsys_irq
4_qsys_uart
5_qsys_timer
6_qsys_sdram
7_qsys_epcs
8_qsys_ip_segled
9_qsys_Nios_II_colorbar
FPGA开发板原理图.pdf
2021-03-14 13:07:23
406.64MB
CYCLONE4 EP4CE10F17C 新起点FPGA开发板Verilog 设计Quartus II工程40个例程源码，包括：
0_uart_top
11_vga_colorbar
12_vga_blockmove
13_vga_char
14_vga_rom_pic
15_lcd_rgb_colorbar
16_lcd_rgb_char
17_top_remote_rcv
18_temp_disp
19_top_dht11
1_flow_led
20_top_cymometer
21_e2prom_top
22_ap3216c_top
23_rtc
24_sdram_rw_test
25_ov7725_rgb565_640x480_vga
26_ov7725_rgb565_640x480_lcd
27_ov5640_rgb565_1024x768_vga
28_ov5640_rgb565_lcd
29_top_sd_rw
2_key_led
30_top_sd_photo_vga
31_top_sd_photo_lcd
32_top_traffic
33_hs_ad_da
34_hs_dual_da
35_hs_dual_ad
36_ov5640_rgb565_yuv_vga
37_ov5460_img_binarization
38_median_filter
39_sobel_edge_dector
3_top_key_beep
40_digital_recognition
41_dual_ov5640_vga
42_dual_ov5640_lcd
4_touch_led
5_seg_led_static_top
6_seg_led_dynamic
7_ip_pll
8_ip_ram
9_ip_fifo
FPGA开发板原理图.pdf
2021-03-14 13:07:23
387.4MB