深信服渠道远程硬件测试说明文档
2021-04-03 09:02:29
209KB
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01.功耗 V3.6
02.信号指示V2.12
03.电源管理 V3.9
04.GSM&GPRS;&EGPRS; V2.6
05.WCDMA V2.6
06.LTE V1.11
07.TDSCDMA V2.10
08.CDMA V2.7
09.HSPA数据业务 V2.0
10.RFID SIM V2.2
11.NFC V1.9
12.Bluetooth V2.8
13.WiFi V2.8
14.GPS V2.11
15.Camera V3.6
16.FM V1.9
17.射频互扰V1.0
18.USB性能 V1.9
19.LCD V2.8
20.TP V2.9
21.Sensor V3.12
22.小器件 V1.9
23.音频 V3.2
24.冲突 V1.10
25.温升 V3.7
26.OTA V2.4
27.SAR V1.9
28.EMC V1.9
29.Safety V1.9
30.机械可靠性V3.0 A标
31.机械可靠性V3.0 B标
32.机械可靠性测试前后检查 V1.0
33.环境可靠性 V2.1
34.长期稳定性 V3.0
35.中长期老化 V2.1
36.单体测试 V1.2
37.皮套测试 V1.0
38.LTE数据业务
39.ISDB-T性能测试
2021-03-04 15:47:18
7.65MB
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According to the standard IEC 61508 fault insertion testing is required for the verification of fail-safe systems. Usually these systems are realized with microcontrollers. Fail-safe systems based on a novel CPLD-based architecture require a different method to perform fault insertion testing than
microcontroller-based systems. This paper describes a method to accomplish fault insertion testing of a system based on the novel CPLD-based architecture using the original system hardware. The goal is to verify the realized safety integrity measures of the system by inserting faults and observing the behavior of the
system. The described method exploits the fact, that the system contains two channels, where both channels contain a CPLD.
During a test one CPLD is configured using a modified programming file. This file is available after the compilation of a VHDL-description, which was modified using saboteurs or mutants. This allows injecting a fault into this CPLD. The other
CPLD is configured as fault-free device. The entire system has to detect the injected fault using its safety integrity measures. Consequently it has to enter and/or maintain a safe state.
微信号：safetyfirst61508
2021-02-26 16:00:28
298KB
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