Ver: 1.1.1l
2022-05-09 19:01:44 3.15MB 综合资源
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巡检管理系统单机版Ver A1.0+ 需要接触版的不要下,这个不是接触版的
2022-05-09 12:58:40 21.93MB 巡检管理系统 Ver A1.0+
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昂达主板光盘 Ver:I-3.3 主板驱动:9.3.0.1020用于H61/67/P61/P67,B75/Z77 Series, 主板驱动版本可用于windows XP/Vista/7 32/64位系统。 显卡驱动:14.51.0.5398用于 windows XP 32/64位系统, 15.26.4.2653用于 windows 7 32/64位系统, 网卡驱动:5.794.05212012nodisk适用于windows XP 32/64位系统, 6.250.01162012适用于windows Vista 32/64位系统, 7.050.01162012适用于windows 7 32/64位系统. 声卡驱动:R267适用于windows XP/Vista/7 32/64位系统。 其它驱动:Intel(R)_USB3.0用于Intel原生的USB3.0主板。 升级内容:增加AR9271 WIFI驱动。
2022-05-06 16:01:38 584.06MB 综合资源 主板驱动 昂达 昂达主板
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Part Name: OEL Display Module Customer Part ID: Allvision Part ID: QG-2864KSWLG01 Ver: A
2022-04-19 11:55:47 953KB OLED
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eWebEditor ver 6.2(for asp+.net)真正意义上的破解版,带后台,支持word/excel导入,截图(在线截屏),文件复制粘贴等所有功能。
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FastStone Capture 是一款出色的屏幕捕捉(截图)软件,它集图像捕捉、浏览、编辑、视频录制等功能于一身,功能完善、使用方便,值得推荐! 软件提供多种捕捉方式(如:活动窗口、指定窗口/对象、矩形区域、手绘区域、整个屏幕、滚动窗口等),提供屏幕录像机、放大镜、拾取颜色、标尺等辅助功能,支持快捷键操作 对于捕捉到的图像,软件提供了多种处理方式,如:在编辑器打开;存入剪贴板或文件;发送到打印机、邮件、WORD、Powerpoint 甚至是网络 FTP 等。用户还可以通过文件名称模板定制文件名以自动保存捕捉内容,支持BMP、GIF、JPG、PNG、TIF、PDF等文件格式,输出文件夹位置也可以自行设定。 软件内置功能完善的图像编辑器,支持几乎所有主流图片格式,除提供缩放、旋转、剪切、格式转换、调整大小等基本功能外,还可向图像中加入标题、边框和水印、文本、线条、图形等内容,并可调整图像颜色,进行多种特效处理。
2022-04-06 03:01:06 8.84MB FSCapture 录视频工具
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ShadowEditor Ver 0.12 dota改图最新版本工具ShadowEditor Ver 0.12 dota改图最新版本工具ShadowEditor Ver 0.12 dota改图最新版本工具
2022-03-30 17:20:37 15.11MB ShadowEditor Ver  Ver 0.12
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Hi3516E V100DMEB_VER_C_PCB&产品简介,参考原理图PCB及产品简介
2022-03-13 18:54:12 4.24MB HI3516EV100
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亲测好用,VAssistX 最新版本的破解补丁,2.0版本,支持VC6.0-VS2017的编译器的VAX的安装。本人安装的是VS2015版本。之前那些1.2版本的并不好用的同学,可以试一试这个。
2022-03-11 18:38:51 2.26MB VAssistX 2.0 破解补丁
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IEEE Standard for System and Software Verification and Validation IEEE Std 1012-2012 Front Cover -14 Title Page -12 Notice to users -9 Laws and regulations -9 Copyrights -9 Updating of IEEE documents -9 Errata -9 Patents -8 Participants -7 Introduction -5 Contents -3 Important notice 1 1. Overview 1 1.1 Scope 1 1.2 Purpose 2 1.3 Field of application 3 1.4 V&V objectives 4 1.5 Organization of the standard 4 1.6 Audience 6 1.7 Conformance 7 1.8 Disclaimer 7 2. Normative references 7 3. Definitions, abbreviations, and acronyms 7 3.1 Definitions 7 3.2 Abbreviations and acronyms 11 4. Relationships between V&V and life cycle processes 12 5. Integrity levels 15 6. V&V processes overview 17 6.1 General 17 6.2 V&V testing 18 7. Common V&V activities 19 7.1 Activity: V&V Management 19 7.2 Activity: Acquisition Support V&V 20 7.3 Activity: Supply Planning V&V 21 7.4 Activity: Project Planning V&V 21 7.5 Activity: Configuration Management V&V 21 8. System V&V activities 33 8.1 Activity: Stakeholder Requirements Definition V&V 33 The purpose of the Stakeholder Requirements Definition Process is to define the requirements for a system that can provide the services needed by users and other stakeholders in a defined environment. It identifies stakeholders, or stakeholder classes... 33 The V&V effort shall perform, as specified in Table 2b for the selected integrity level, the following Stakeholder Requirements Definition V&V tasks described in Table 1b: 33 8.2 Activity: Requirements Analysis V&V 33 8.3 Activity: Architectural Design V&V 34 8.4 Activity: Implementation V&V 35 8.5 Activity: Integration V&V 35 8.6 Activity: Transition V&V 36 8.7 Activity: Operation V&V 36 8.8 Activity: Maintenance V&V 37 8.9 Activity: Disposal V&V 38 9. Software V&V activities 68 9.1 Activity: Software Concept V&V 68 9.2 Activity: Software Requirements V&V 68 9.3 Activity: Software Design V&V 69 9.4 Activity: Software Construction V&V 69 9.5 Activity: Software Integration Test V&V 70 9.6 Activity: Software Qualification Test V&V 70 9.7 Activity: Software Acceptance Test V&V 71 9.8 Activity: Software Installation and Checkout V&V 71 9.9 Activity: Software Operation V&V 72 9.10 Activity: Software Maintenance V&V 72 9.11 Activity: Software Disposal V&V 73 10. Hardware V&V activities 110 10.1 Activity: Hardware Concept V&V 110 10.2 Activity: Hardware Requirements V&V 110 10.3 Activity: Hardware Design V&V 111 10.4 Activity: Hardware Fabrication V&V 111 10.5 Activity: Hardware Integration Test V&V 112 10.6 Activity: Hardware Qualification Test V&V 112 10.7 Activity: Hardware Acceptance Test V&V 113 10.8 Activity: Hardware Transition V&V 113 10.9 Activity: Hardware Operation V&V 114 10.10 Activity: Hardware Maintenance V&V 114 10.11 Activity: Hardware Disposal V&V 115 11. V&V reporting, administrative, and documentation requirements 147 11.1 V&V reporting requirements 147 11.2 V&V administrative requirements 150 11.3 V&V documentation requirements 150 12. V&V plan outline 151 12.1 Overview 151 12.2 VVP Section 1: Purpose 152 12.3 VVP Section 2: Referenced documents 152 12.4 VVP Section 3: Definitions 152 12.5 VVP Section 4: V&V overview 152 12.5.1 VVP Section 4.1: Organization 152 12.5.2 VVP Section 4.2: Master schedule 153 12.5.3 VVP Section 4.3: Integrity level scheme 153 12.5.4 VVP Section 4.4: Resources summary 153 12.5.5 VVP Section 4.5: Responsibilities 153 12.5.6 VVP Section 4.6: Tools, techniques, and methods 153 12.6 VVP Section 5: V&V processes 154 12.6.1 VVP Section 5.1: Common V&V Processes, Activities, and Tasks 154 12.6.2 VVP Section 5.2: System V&V Processes, Activities, and Tasks 154 12.6.3 VVP Section 5.3: Software V&V Processes, Activities, and Tasks 154 12.6.4 VVP Section 5.4: Hardware V&V Processes, Activities, and Tasks 154 12.7 VVP Section 6: V&V reporting requirements 154 12.8 VVP Section 7: V&V administrative requirements 154 12.8.1 General 154 12.8.2 VVP Section 7.1: Anomaly resolution and reporting 154 12.8.3 VVP Section 7.2: Task iteration policy 154 12.8.4 VVP Section 7.3: Deviation policy 155 12.8.5 VVP Section 7.4: Control procedures 155 12.8.6 VVP Section 7.5: Standards, practices, and conventions 155 12.9 VVP Section 8: V&V test documentation requirements 155 Annex A (informative) Mapping of IEEE 1012 V&V activities and tasks 156 A.1 Mapping of ISO/IEC 15288 V&V requirements to IEEE 1012 V&V activities and tasks 156 A.2 Mapping of IEEE 1012 V&V activities to ISO/IEC 15288 system life cycle processes and activities 158 A.3 Mapping of ISO/IEC 12207 V&V requirements to IEEE 1012 V&V activities and tasks 159 A.4 Mapping of IEEE 1012 V&V activities to IEEE 12207 software life cycle processes and activities 161 Annex B (informative) A risk-based, integrity-level scheme 163 Annex C (informative) Definition of independent V&V (IV&V) 165 C.1 Technical independence 165 C.2 Managerial independence 165 C.3 Financial independence 165 C.4 Forms of independence 165 C.4.1 Classical IV&V 166 C.4.2 Modified IV&V 166 C.4.3 Integrated IV&V 166 C.4.4 Internal IV&V 166 C.4.5 Embedded V&V 167 Annex D (informative) V&V of reuse software 168 D.1 Purpose 168 D.2 V&V of software developed in a reuse process 169 D.2.1 V&V of assets in development 169 D.2.2 V&V of reused assets 169 D.3 V&V of software developed and reused outside of a reuse process 169 Annex E (informative) V&V measures 175 E.1 Introduction 175 E.2 Measures for evaluating anomaly density 175 E.3 Measures for evaluating V&V effectiveness 176 E.4 Measures for evaluating V&V efficiency 176 Annex F (informative) Example of V&V relationships to other project responsibilities 178 Annex G (informative) Optional V&V tasks 179 Annex H (informative) Environmental factors considerations 185 H.1 Introduction 185 H.2 In the agreement processes 185 H.3 In the organizational project-enabling processes 185 H.4 In the project processes 186 H.5 In the technical processes 186 Annex I (informative) V&V of system, software, and hardware integration 188 I.1 Introduction 188 I.2 Examples of system failures caused by integration issues 188 I.2.1 Year 2000 System Integration Issue 189 I.2.2 System architecture integration issues 189 I.3 System, software, and hardware interaction issues 190 Annex J (informative) Hazard, security, and risk analyses 193 J.1 Hazard analysis 193 Annex K (informative) Example of assigning and changing the system integrity level of “supporting system functions” 198 Annex L (informative) Mapping of ISO/IEC/IEEE 15288 and IEEE 12207 process outcomes to V&V tasks 200 Annex M (informative) Bibliography 209
2022-03-07 09:00:27 8.51MB IEEE 1012 测试验证 VER
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