基于FPGA的神经网络硬件实现 本文主要的工作是研究神经网络的硬件实现问题，神经网络的硬件实现是神经网络研究的基本问题之一，在构造神经网络的实际应用系统时，必然要研究和解决其硬件实现的问题。神经网络专用硬件可提供高速度，并具有比通用串、并行机高得多的性能价格比，所以，特定应用下的高性能专用神经网络硬件是神经网络研究的热点。本文在比较了几种神经网络的可行性基础上，选用了BP神经网络作为硬件实现的神经网络模型。BP神经网络对输入输出非线性关系的高精度映射能力、较强的包容性、良好的推广能力和泛化能力，使得它们在实际应用中表现出了强大的生命力，成为当今的研究热点之一。作为BP神经网络中的激励函数之一的双曲正切S型(tan-s)函数适用于变化剧烈的场合，能够加快网络学习收敛速度。可编程技术的迅猛发展，在EDA技术中占有举足轻重的地位。
2022-02-21 20:04:02
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针对传统ADC/DAC应用中采样数据并行传输存在线间串扰大、同步难等问题，设计了一种基于高速串行协议——JESD204B的数据收发接口。以Xilinx公司V7系列FPGA为核心控制单元设计电路，在单通道传输速率为6 Gb/s的条件下完成数据收发测试，验证了传输过程中数据的同步性、准确性及整体方案的可行性。设计结果表明，这种串行传输方式不仅解决了并行传输所带来的诸多问题，还降低了制板设计时PCB布线的复杂程度、减少了板层数量、节约了成本。
2022-02-21 16:42:41
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实现了一种基于FPGA与LabVIEW平台的任意波形发生器。通过FPGA搭建硬件平台，与LabVIEW上位机软件实现串口通信，实时调整FPGA内部波形数据，可实现正弦波、方波、锯齿波、三角波、高斯白噪声、叠加正弦波、自定义公式等常规波形，同时也可以手动绘制任意波形，充分发挥了软件的灵活性。通过参数的设定，可方便地设计各种复杂波形。本设计在EP4CE15F17C8芯片上实现，与LabVIEW上位机软件协同工作，经测试系统具有良好的稳定性、灵活性。
2022-02-20 14:40:14
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在二进制离散无记忆信道中极化码可以达到其信道极限容量，并且实现的复杂度较低，这在通信领域无疑是一个重大突破，因此在FPGA中实现极化码的译码有着非常重要的研究意义。首先介绍了SC（Successive Cancellation）译码算法，并将该算法的蝶形结构改进为线形结构从而提高了译码效率；接着对译码算法做了包括最小和译码、定点量化和资源共享的改进，以便于在硬件中更容易实现；最后在FPGA中实现了极化码的译码并给出了测试波形以及对不同编码块长度的综合资源进行了对比。实验结果表明，译码的最高频率可达145 MHz，吞吐率可达36.4 Mbps。
2022-02-18 21:04:46
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基于FPGA通用异步收发器UART设计
UART模块与串口助手正常通信
OLED 屏幕显示发送和接收数据及波特率
使用Quartus II 11.0 软件程序编写
modelsim仿真软件进行时序仿真
Verilog 语言
2022-02-17 15:04:09
20.59MB
基于FPGA的嵌入式图像处理系统设计，英文版，非扫描版，内容清晰。
作者简介
Donald G Bailey is Associate Professor in the Institute of Information Sciences and Technology at Massey University, where he leads the Image and Signal Processing Research Group. His research interests include most aspects of image analysis, but in particular the algorithm development process, and training. Bailey has developed a Vision Image Processing System package which has been used in a wide range of image analysis applications. Current and recent projects include: image processing using FPGAs, real time produce grading using machine vision, super-resolution, and sub pixel measurement techniques, camera calibration, and coastal monitoring using automated video analysis. He has been working as an electronics and computer systems engineer in the field of image analysis and machine vision for over 25 years. He began applying FPGA technology to image processing in 2002, and since then has published about 25 papers on issues and applications of FPGAs to image processing.
目录
Preface.
Acknowledgements.
1 Image Processing.
1.1 Basic Definitions.
1.2 Image Formation.
1.3 Image Processing Operations.
1.4 Example Application.
1.5 Real-Time Image Processing.
1.6 Embedded Image Processing.
1.7 Serial Processing.
1.8 Parallelism.
1.9 Hardware Image Processing Systems.
2 Field Programmable Gate Arrays.
2.1 Programmable Logic.
2.2 FPGAs and Image Processing.
2.3 Inside an FPGA.
2.4 FPGA Families and Features.
2.5 Choosing an FPGA or Development Board.
3 Languages.
3.1 Hardware Description Languages.
3.2 Software-Based Languages.
3.3 Visual Languages.
3.4 Summary.
4 Design Process.
4.1 Problem Specification.
4.2 Algorithm Development.
4.3 Architecture Selection.
4.4 System Implementation.
4.5 Designing for Tuning and Debugging.
5 Mapping Techniques.
5.1 Timing Constraints.
5.2 Memory Bandwidth Constraints.
5.3 Resource Constraints.
5.4 Computational Techniques.
5.5 Summary.
6 Point Operations.
6.1 Point Operations on a Single Image.
6.2 Point Operations on Multiple Images.
6.3 Colour Image Processing.
6.4 Summary.
7 Histogram Operations.
7.1 Greyscale Histogram.
7.2 Multidimensional Histograms.
8 Local Filters.
8.1 Caching.
8.2 Linear Filters.
8.3 Nonlinear Filters.
8.4 Rank Filters.
8.5 Colour Filters.
8.6 Morphological Filters.
8.7 Adaptive Thresholding.
8.8 Summary.
9 Geometric Transformations.
9.1 Forward Mapping.
9.2 Reverse Mapping.
9.3 Interpolation.
9.4 Mapping Optimisations.
9.5 Image Registration.
10 Linear Transforms.
10.1 Fourier Transform.
10.2 Discrete Cosine Transform.
10.3 Wavelet Transform.
10.4 Image and Video Coding.
11 Blob Detection and Labelling.
11.1 Bounding Box.
11.2 Run-Length Coding.
11.3 Chain Coding.
11.4 Connected Component Labelling.
11.5 Distance Transform.
11.6 Watershed Transform.
11.7 Hough Transform.
11.8 Summary.
12 Interfacing.
12.1 Camera Input.
12.2 Display Output.
12.3 Serial Communication.
12.4 Memory.
12.5 Summary.
13 Testing, Tuning and Debugging.
13.1 Design.
13.2 Implementation.
13.3 Tuning.
13.4 Timing Closure.
14 Example Applications.
14.1 Coloured Region Tracking.
14.2 Lens Distortion Correction.
14.3 Foveal Sensor.
14.4 Range Imaging.
14.5 Real-Time Produce Grading.
14.6 Summary.
References.
Index.
2022-02-16 21:38:40
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本文提出了一种新的实现方法--基于FPGA和通用异步通信芯片实现多串口通信设计。在不进行硬件改动的基础上，通过在FPGA内建立一个缓存机制，实现接收串口芯片的数据，达到一定量时向DSP发送中断读取数据。
2022-02-15 12:31:14
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