Eclipse IOT软件架构白皮书,含开源软件架构,平台,gateway,云平台等(Eclipse IoT White Paper - The Three Software Stacks Required for IoT Architectures.pdf)
2021-07-28 13:41:24 1.82MB IOT Eclipse cloud platform
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Learning Deep Architectures for AI 中文版
2021-07-20 08:55:46 1.68MB dl ai
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64-ia-32-architectures-software-developer-vol-2b-manual
2021-07-16 20:00:49 2.72MB intel
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Intel 64 and IA-32 Architectures Software Developer’s Manual, Volume 3C
2021-07-15 18:00:45 3.61MB intel
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Intel 64 and IA-32 Architectures Software Developer’s Manual Combined Volumes1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D and 4-解密注释.pdf
2021-07-08 09:00:47 36.9MB intel
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【中文版】architectural styles and the design of network-based software architectures
2021-07-07 16:49:42 760KB rest 架构
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spaCy 用户手册,spaCy是我的自然语言处理(NLP)任务的必备库
2021-07-01 18:02:42 594KB spacy 用户手册
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Clean Architectures in Python A practical approach to better software design By 作者: Leonardo Giordani Pub Date: 2019 ISBN: n/a Pages: 171 Language: English Format: PDF Size: 10 Mb The clean architecture is the opposite of spaghetti code, where everything is interlaced and there are no single elements that can be easily detached from the rest and replaced without the whole system collapsing. The main point of the clean architecture is to make clear “what is where and why”, and this should be your first concern while you design and implement a software system, whatever architecture or development methodology you want to follow. This book is divided into two parts. The first part is about Test-driven Development (TDD), a programming technique that will help you more reliable and easily modifiable software. I will first guide you through a very simple example in chapter 1, demonstrating how to use TDD to approach a project, and how to properly create tests from requirements. In chapter 2 I will then discuss unit testing from a more theoretical point of view, categorising functions and their tests. Chapter 3 will introduce mocks, a powerful tool that helps to test complex scenarios. The second part introduces the clean architecture. The first chapter discusses briefly the components and the ideas behind this software structure, while chapter 2 runs through a concrete example of clean architecture for a very simple web service. Chapter 3 discusses error management and improvements to the Python code developed in the previous chapter. Finally, chapter 4 shows how to plug different database systems to the web service created previously.
2021-06-28 15:44:10 1.76MB Python
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"Network-on-Chip Architectures: A Holistic Design Exploration" by Chrysostomos Nicopoulos Publisher: Springer | ISBN: 9048130301 | 2009 | PDF | 223 pages | 9 Mb The continuing reduction of feature sizes into the nanoscale regime has led to dramatic increases in transistor densities. Integration at these levels has highlighted the criticality of the on-chip interconnects. Network-on-Chip (NoC) architectures are viewed as a possible solution to burgeoning global wiring delays in many-core chips, and have recently crystallized into a significant research domain. On-chip networks instill a new flavor to communication research due to their inherently resource-constrained nature. Despite the lightweight character demanded of the NoC components, modern designs require ultra-low communication latencies in order to cope with inflating data bandwidths. The work presented in Network-on-Chip Architectures addresses these issues through a comprehensive exploration of the design space. The design aspects of the NoC are viewed through a penta-faceted prism encompassing five major issues: (1) performance, (2) silicon area consumption, (3) power/energy efficiency, (4) reliability, and (5) variability. These five aspects serve as the fundamental design drivers and critical evaluation metrics in the quest for efficient NoC implementations. The research exploration employs a two-pronged approach: (a) MICRO-architectural innovations within the major NoC components, and (b) MACRO-architectural choices aiming to seamlessly merge the interconnection backbone with the remaining system modules. These two research threads and the aforementioned five key metrics mount a holistic and in-depth attack on most issues surrounding the design of NoCs in multi-core architectures.
2021-06-24 13:52:53 7.88MB Network-on-Chip
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Intel64 and IA-32 Architectures Software Develope Manual V1-Basic Architecture
2021-06-19 17:00:42 7.08MB intel
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