DDComponent 实现功能： 组件可以单独调试 杜绝组件之前相互转换，代码完全隔离，彻底解耦 组件之间通过接口+实现的方式进行数据传输 使用方案和主机路由的方式进行活动之间的重新安排 自动生成路由转发路由表 任意组件可以重置主机，集成其他组件进行集成调试 可以动态对已集成的组件进行加载和卸载 支持kotlin组件 使用指南 1，主项目引用编译脚本 在根目录的gradle.properties文件中，增加属性： mainmodulename =app 其中mainmodulename是项目中的host工程，一般为app 在根目录的build.gradle中增加配置 buildscript { dependencies { classpath ' com.luojilab.ddcomponent:build-gradle:1.2.0 ' } } 为每个组件约会依赖库，如果项目中存在basiclib等基础库，可以统一提交basiclib compile ' com.luojilab.ddcomponent:componentlib:1.3.0 ' 2

cloud-architecture-use-cases：适合不同天青服务的现实世界用例列表

目前能找到虚拟化技术讲的最深，最透的一本书。 非常不错，有价值。介绍了虚拟化的历史、基础理论、X86 ARM的芯片支持，介绍了KVM以及ZEN的支持情况，同时对比了这两种虚拟机以及两种指令集架构的性能对比，以及后续展望。

企业通过使用容器，日益实现成本节约、解决部署问题并改进 DevOps 和生产操作。 通过创建 Azure Kubernetes 服务、Azure Service Fabric 等产品，同时与 Docker、Mesosphere 和 Kubernetes 等行业领先者合作，Microsoft 一直在推出适用于 Windows 和 Linux 的容器创新。 这些产品提供容器解决方案，可帮助公司以云的速度和规模生成并部署应用程序，而无需考虑其选用的平台或工具。 Docker 正在逐渐成为容器行业的事实标准，受到 Windows 和 Linux 生态系统领域最重要供应商的支持。

k8s架构图，原图需要，上传到csdn，大家引用啥的不会出现加载不出来的情况，方便大家创作，凑50字

horizon-architecture-planning-7.7架构规划指南

Multi-processor system on chip (MPSoC) has been widely applied in embedded systems in the past decades. However, it has posed great challenges to efficiently design and implement a rapid prototype for diverse applications due to heterogeneous instruction set architectures (ISA), programming interfaces and software tool chains. In order to solve the problem, this paper proposes a novel high level architecture support for automatic out-of-order (OoO) task execution on FPGA based heterogeneous MPSoCs. The architecture support is composed of a hierarchical middleware with an automatic task level OoO parallel execution engine. Incorporated with a hierarchical OoO layer model, the middleware is able to identify the parallel regions and generate the sources codes automatically. Besides, a runtime middleware Task-Scoreboarding analyzes the inter-task data dependencies and automatically schedules and dispatches the tasks with parameter renaming techniques. The middleware has been verified by the prototype built on FPGA platform. Examples and a JPEG case study demonstrate that our model can largely ease the burden of programmers as well as uncover the task level parallelism.

Network Processors Architecture Programming and Implementation

Mary Shaw和David Garlan老师的软件体系结构作品

The advent of multicore processors has renewed interest in the idea of incorporating transactions into the programming model used to write parallel programs.This approach, known as transactional memory, offers an alternative, and hopefully better, way to coordinate concurrent threads. The ACI (atomicity, consistency, isolation) properties of transactions provide a foundation to ensure that con- current reads and writes of shared data do not produce inconsistent or incorrect results. At a higher level, a computation wrapped in a transaction executes atomically - either it completes successfully and commits its result in its entirety or it aborts. In addition, isolation ensures the transaction pro- duces the same result as if no other transactions were executing concurrently. Although transactions are not a parallel programming panacea, they shift much of the burden of synchronizing and co- ordinating parallel computations from a programmer to a compiler, to a language runtime system, or to hardware. The challenge for the system implementers is to build an efficient transactional memory infrastructure. This book presents an overview of the state of the art in the design and implementation of transactional memory systems, as of early spring 2010.