PETER MARWEDEL 相当好的一本书

R.E.Fischer, B.Tadic-Galeb, P.R.Yoder; with contributions by R.Galeb et al.

MC9S12DP256／DG128 Hardware & Basic System Design.pdf

Embedded System Design

信号处理 第二版 英文原版 Nasser Kehtarnavaz

This book provides a comprehensive overview of the latest research and standardization progress towards the 5th generation (5G) of mobile communications technology and beyond. It covers a wide range of topics from 5G use cases and their requirements, to spectrum, 5G end-to-end (E2E) system architecture including core network (CN), transport network (TN) and radio access network (RAN) architecture, network slicing, security and network management. It further dives into the detailed functional design and the evaluation of different 5G concepts, and provides details on planned trials and pre-commercial deployments across the globe. While the book naturally captures the latest agreements in 3rd Generation Partnership Project (3GPP) New Radio (NR) Release 15, it goes significantly beyond this by describing the likely developments towards the final 5G system that will ultimately utilize a wide range of spectrum bands, address all envisioned 5G use cases, and meet or exceed the International Mobile Telecommunications (IMT) requirements for the year 2020 and beyond (IMT-2020). 5G System Design: Architectural and Functional Considerations and Long Term Research is based on the knowledge and consensus from 158 leading researchers and standardization experts from 54 companies or institutes around the globe, representing key mobile network operators, network vendors, academic institutions and regional bodies for 5G. Different from earlier books on 5G, it does not focus on single 5G technology components, but describes the full 5G system design from E2E architecture to detailed functional design, including details on 5G performance, implementation and roll-out.

OpenLANE OpenLANE是一种自动化的RTL2GDSII流程，其中包括许多其他EDA工具。 Yosys，OpenSTA，Netgen，Magic等。OpenLANE的主要思想是在没有任何人工干预的情况下拥有完整而干净的RTL2GDSII流。 OpenLANE针对Skywatrer 130nm开源PDK进行了调整，可用于生产硬宏和芯片。 介绍 OpenLANE ASIC流程有几个步骤。 该流程以设计RTL开始，以GSII格式的最终​​布局结束。 要使它发挥作用，需要PDK。 OpenLANE基于多个开源项目，例如Magic，Yosys，qflow，Fault，openroad，abc和Klayout。 这是ASIC流程。 该流程从RTL合成开始。 RTL在某些设计约束下被馈送到yosys 。 yosys基本上使用工程组件将RTL转换为逻辑电路。 该电路经过优化，然后使用abc映

国外人编写的模型预测控制，内容非常的翔实，而且专门介绍了在matlab下进行模型预测控制的实现。

Digital System Design with FPGA 英文无水印pdf pdf所有页面使用FoxitReader和PDF-XChangeViewer测试都可以打开 本资源转载自网络，如有侵权，请联系上传者或csdn删除 本资源转载自网络，如有侵权，请联系上传者或csdn删除

作者多年从事控制系统开发，这本书将控制理论讲述的非常浅显易懂，里面有大量作者从事控制系统开发的实际操作经验，很值得学习。