The purpose of this book is to answer the following question: How do you document an architecture so that others can successfully use it, maintain it, and build a system from it?

This book draws from three areas of computing: image processing, computer vision, and computer graphics. Image processing and computer vision in particular have long been separate fields with overlapping interests. This is partly a sociolog- ical phenomenon—image processing comes from electrical engineering, while computer vision comes from computer science. These two fields blend smoothly in digital camera design. The modern imaging chain starts at traditional filtering and ends with feature analysis. Parts of this book draw upon my research work with my students at Princeton and Georgia Tech. Cheng-Yao Chen, Santanu Dutta, Jason Fritts, Se Hun Kim, Changhong Lin, Chung-Ching Lin, Tiehan Lv, Jason Schlessman, Senem Velipasalar, Jiang Xu, Heather Yu, and Shengqi Yang have all worked on aspects of multimedia computing and embedded computer vision. I am grateful to them for the opportunity to work with them and learn from them. Burak Ozer was not my official student, but he has been my friend and collaborator on smart cameras for the past 15 years.

Intel处理器技术文档《Ten-Volume Set of Intel@64 and IA-32 Architectures software Developer's Manual》，10卷Intel 64和IA-32架构软件开发者手册，合计10个pdf文档。

phy-interface-pci-express-sata-usb30-architectures-3.1 v5.2.

路由是把信息从源穿过网络传递到目的的行为，在路上，至少遇到一个中间节点。路由通常与桥接来对比，在粗心的人看来，它们似乎完成的是同样的事。它们的主要区别在于桥接发生在OSI参考协议的第二层(链接层)，而路由发生在第三层(网络层)。这一区别使二者在传递信息的过程中使用不同的信息，从而以不同的方式来完成其任务。

Floating-Point Fused Multiply-Add Architectures，关于浮点乘加融合部件设计的博士论文2007

Alberto Leon-Garcia & Indra Widjaja，国外网络通信经典教材

Embedded Computer Systems Architectures, Modeling, and Simulation

High Efficiency Video Coding Hevc Algorithms and Architectures

THE CONTEXT OF PARALLEL PROCESSING The field of digital computer architecture has grown explosively in the past two decades. Through a steady stream of experimental research, tool-building efforts, and theoretical studies, the design of an instruction-set architecture, once considered an art, has been transformed into one of the most quantitative branches of computer technology. At the same time, better understanding of various forms of concurrency, from standard pipelining to massive parallelism, and invention of architectural structures to support a reasonably efficient and user-friendly programming model for such systems, has allowed hardware performance to continue its exponential growth. This trend is expected to continue in the near future. This explosive growth, linked with the expectation that performance will continue its exponential rise with each new generation of hardware and that (in stark contrast to software) computer hardware will function correctly as soon as it comes off the assembly line, has its down side. It has led to unprecedented hardware complexity and almost intolerable dev- opment costs. The challenge facing current and future computer designers is to institute simplicity where we now have complexity; to use fundamental theories being developed in this area to gain performance and ease-of-use benefits from simpler circuits; to understand the interplay between technological capabilities and limitations, on the one hand, and design decisions based on user and application requirements on the other.