论文 基于机器视觉的TFT_LCD屏Mura缺陷检测方法研究_李茂
2021-07-02 16:27:03 6.57MB 机器视觉 mura缺陷 缺陷检测 TFT
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读取SD卡中的BMP图片并通过VGA LCD屏显示的Verilog逻辑源码Quartus工程文件+文档说明,实验将SD卡里的BMP图片读出,写入到外部存储器,再通过 VGA、LCD 等显示,FPGA型号Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。 module top( input clk, input rst_n, input key1, output [5:0] seg_sel, output [7:0] seg_data, output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b, //vga blue output sd_ncs, //SD card chip select (SPI mode) output sd_dclk, //SD card clock output sd_mosi, //SD card controller data output input sd_miso, //SD card controller data input output sdram_clk, //sdram clock output sdram_cke, //sdram clock enable output sdram_cs_n, //sdram chip select output sdram_we_n, //sdram write enable output sdram_cas_n, //sdram column address strobe output sdram_ras_n, //sdram row address strobe output[1:0] sdram_dqm, //sdram data enable output[1:0] sdram_ba, //sdram bank address output[12:0] sdram_addr, //sdram address inout[15:0] sdram_dq //sdram data ); parameter MEM_DATA_BITS = 16 ; //external memory user interface data width parameter ADDR_BITS = 24 ; //external memory user interface address width parameter BUSRT_BITS = 10 ; //external memory user interface burst width wire
FPGA读取OV5640摄像头数据并通过VGA或LCD屏显示输出的Verilog逻辑源码Quartus工程文件+文档说明,FPGA型号Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。 module top( input clk, input rst_n, output cmos_scl, //cmos i2c clock inout cmos_sda, //cmos i2c data input cmos_vsync, //cmos vsync input cmos_href, //cmos hsync refrence,data valid input cmos_pclk, //cmos pxiel clock output cmos_xclk, //cmos externl clock input [7:0] cmos_db, //cmos data output cmos_rst_n, //cmos reset output cmos_pwdn, //cmos power down output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b, //vga blue output sdram_clk, //sdram clock output sdram_cke, //sdram clock enable output sdram_cs_n, //sdram chip select output sdram_we_n, //sdram write enable output sdram_cas_n, //sdram column address strobe output sdram_ras_n, //sdram row address strobe output[1:0] sdram_dqm, //sdram data enable output[1:0] sdram_ba, //sdram bank address output[12:0] sdram_addr, //sdram address inout[15:0] sdram_dq //sdram data ); parameter MEM_DATA_BITS = 16; //external memory user interface data width parameter ADDR_BITS = 24; //external memory user interface address width p
FPGA设计读取SD卡中的图片并通过TFT-LCD屏显示输出的Verilog设计Quartus工程源码文件,FPGA型号Cyclone4E系列中的EP4CE10F17C8,Quartus版本18.0。 module top_sd_photo_lcd( input sys_clk , //系统时钟 input sys_rst_n , //系统复位,低电平有效 //SD卡接口 input sd_miso , //SD卡SPI串行输入数据信号 output sd_clk , //SD卡SPI时钟信号 output sd_cs , //SD卡SPI片选信号 output sd_mosi , //SD卡SPI串行输出数据信号 //SDRAM接口 output sdram_clk , //SDRAM 时钟 output sdram_cke , //SDRAM 时钟有效 output sdram_cs_n , //SDRAM 片选 output sdram_ras_n , //SDRAM 行有效 output sdram_cas_n , //SDRAM 列有效 output sdram_we_n , //SDRAM 写有效 output [1:0] sdram_ba , //SDRAM Bank地址 output [1:0] sdram_dqm , //SDRAM 数据掩码 output [12:0] sdram_addr , //SDRAM 地址 inout [15:0] sdram_data , //SDRAM 数据 //lcd接口 output lcd_hs , //LCD 行同步信号 output lcd_vs , //LCD 场同步信号 output lcd_de , //LCD 数据输入使能 output [15:0] lcd_rgb , //LCD RGB565颜色数据 output lcd_bl , //LCD 背光控制信号 output lcd_rst , //LCD 复位信号 output lcd_pclk //LCD 采样时钟 ); //parameter define parameter PHOTO_H_PIXEL = 24'd800 ; //设置SDRAM缓存大小 parameter PHOTO_V_PIXEL = 24'd480 ; //设置SDRAM缓存大小 //wire define wire clk_100m ; //100mhz时钟,SDRAM操作时钟 wire clk_100m_shift ; //100mhz时钟,SDRAM相位偏移时钟 wire clk_50m ; wire clk_50m_180deg ; wire clk_33_3m ; wire rst_n ; wire locked ; wire sys_init_done ; //系统初始化
基于HALCON 的视频代码,检测屏幕坏点功能,带有图片,基于论文http://www.doc88.com/p-1921584170040.html编写
2021-03-26 13:31:08 2KB HALCON lcd屏 坏点检测
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FPGA设计LCD屏幕显示彩条Verilog设计Quartus工程源码文件,FPGA型号Cyclone4E系列中的EP4CE10F17C8,Quartus版本18.0。 module lcd_rgb_colorbar( input sys_clk, //系统时钟 input sys_rst_n, //系统复位 //RGB LCD接口 output lcd_de, //LCD 数据使能信号 output lcd_hs, //LCD 行同步信号 output lcd_vs, //LCD 场同步信号 output lcd_clk, //LCD 像素时钟 inout [15:0] lcd_rgb, //LCD RGB565颜色数据 output lcd_rst, output lcd_bl ); wire [15:0] lcd_id ; //LCD屏ID wire lcd_pclk ; //LCD像素时钟 wire [10:0] pixel_xpos; //当前像素点横坐标 wire [10:0] pixel_ypos; //当前像素点纵坐标 wire [10:0] h_disp ; //LCD屏水平分辨率 wire [10:0] v_disp ; //LCD屏垂直分辨率 wire [15:0] pixel_data; //像素数据 wire [15:0] lcd_rgb_o ; //输出的像素数据 wire [15:0] lcd_rgb_i ; //输入的像素数据 //***************************************************** //** main code //***************************************************** //像素数据方向切换 assign lcd_rgb = lcd_de ? lcd_rgb_o : {16{1'bz}}; assign lcd_rgb_i = lcd_rgb; //读LCD ID模块 rd_id u_rd_id( .clk (sys_clk ), .rst_n (sys_rst_n), .lcd_rgb (lcd_rgb_i), .lcd_id (lcd_id ) ); //时钟分频模块 clk_div u_clk_div( .clk (sys_clk ), .rst_n (sys_rst_n), .lcd_id (lcd_id ), .lcd_pclk (lcd_pclk ) ); //LCD显示模块 lcd_display u_lcd_display( .lcd_pclk (lcd_pclk ), .rst_n (sys_rst_n ), .pixel_xpos (pixel_xpos), .pixel_ypos (pixel_ypos), .h_disp (h_disp ), .v_disp (v_disp ), .pixel_data (pixel_data) ); //LCD驱动模块 lcd_driver u_lcd_driver( .lcd_pclk (lcd_pclk ), .rst_n (sys_rst_n ), .lcd_id (lcd_id ), .pixel_data (pixel_data)
LCD+OLED+LCM屏选型手册包括LCM101 CM103 LCD1602 LCD12864等, 0596-DEMO上板图纸6-15.pdf 12864中文字库型液晶模块手册.pdf 12864汉字液晶测试电路.pdf JHD(C0G)12864A-3.3V v2.0.pdf JHD(COG)12864-ZK-A.PDF jhd12864-.pdf JHD12864-RA8815_c.C JHD529(12864F).pdf JHD613-12864.pdf JHDC12864Bv2.0.pdf LCD 12864D.doc lcd12864F.c LCD1602.pdf LCM101.pdf LCM103 10 位 8 段带小数点 液晶显示模块技术说明书.pdf lcm103.pdf M00538_VGM128032A3W09_A01.pdf M00596_VGM128064B1B03_A02.pdf M00822_VGM128064B7B01_A03.pdf M01000_VGM128032A7W01_A01.pdf M01030_VGM128032A8W01_A01.pdf Ra8816_DS_V14_Chi.pdf SO12864-12C系列模块说明书.pdf SO12864-14E LCM.pdf SSD1305_2.0.pdf ZYMG12864-9.pdf
FPC1.0 LCP屏接口Altium封装库AD三维视图PCB封装库(2D3D封装库)封装列表如下:Component Count : 29 Component Name ----------------------------------------------- FPC1.0-2H-WS-2P FPC1.0-2H-WS-3P FPC1.0-2H-WS-4P FPC1.0-2H-WS-5P FPC1.0-2H-WS-6P FPC1.0-2H-WS-7P FPC1.0-2H-WS-8P FPC1.0-2H-WS-9P FPC1.0-2H-WS-10P FPC1.0-2H-WS-11P FPC1.0-2H-WS-12P FPC1.0-2H-WS-13P FPC1.0-2H-WS-14P FPC1.0-2H-WS-15P FPC1.0-2H-WS-16P FPC1.0-2H-WS-17P FPC1.0-2H-WS-18P FPC1.0-2H-WS-19P FPC1.0-2H-WS-20P FPC1.0-2H-WS-21P FPC1.0-2H-WS-22P FPC1.0-2H-WS-23P FPC1.0-2H-WS-24P FPC1.0-2H-WS-25P FPC1.0-2H-WS-26P FPC1.0-2H-WS-27P FPC1.0-2H-WS-28P FPC1.0-2H-WS-29P FPC1.0-2H-WS-30P
FPC0.5 0.5mm间距LCD屏接口Altium封装库AD三维视图PCB封装库(2D3D封装库),封装列表如下: Component Count : 37 Component Name ----------------------------------------------- FPC0.5 2H-WS-4P FPC0.5 2H-WS-5P FPC0.5 2H-WS-6P FPC0.5 2H-WS-7P FPC0.5 2H-WS-8P FPC0.5 2H-WS-9P FPC0.5 2H-WS-10P FPC0.5 2H-WS-11p FPC0.5 2H-WS-12P FPC0.5 2H-WS-13P FPC0.5 2H-WS-14P FPC0.5 2H-WS-15P FPC0.5 2H-WS-16P FPC0.5 2H-WS-17P FPC0.5 2H-WS-18P FPC0.5 2H-WS-19P FPC0.5 2H-WS-20P FPC0.5 2H-WS-21P FPC0.5 2H-WS-22P FPC0.5 2H-WS-23P FPC0.5 2H-WS-24P FPC0.5 2H-WS-25P FPC0.5 2H-WS-26P FPC0.5 2H-WS-27P FPC0.5 2H-WS-28P FPC0.5 2H-WS-29P FPC0.5 2H-WS-30P FPC0.5 2H-WS-31P FPC0.5 2H-WS-32P FPC0.5 2H-WS-33P FPC0.5 2H-WS-34P FPC0.5 2H-WS-35P FPC0.5 2H-WS-36P FPC0.5 2H-WS-37P FPC0.5 2H-WS-38P FPC0.5 2H-WS-39P FPC0.5 2H-WS-40P
很好的lcd屏控制程序 做项目是写的现在共享
2021-03-10 17:55:23 883KB lcd 源码
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