概述: 该USB转TTL串口主要用于STC单片机下载或升级以及刷机烧录等,主要采用CH340T芯片进行数据接口通信,同时外接USB接口。支持XP/Win7/Win8/安卓系统等。同时CH340是STC原厂指定的下载芯片。 CH340与PL2302性能对比: 可以支持XP WIN7 WIN8 安卓苹果系统。而PL2303的一般只能在XP系统里可以下载,到WIN7系统里就经常出现蓝屏。 支持USB1.1或者USB2.0/USB3.0通信,PL2303这个只能直插2.0 具有仿真接口,可以升级外围串口设备,PL2303没 支持常用的MODE联络信号,PL2303没 支持IRDA的SIR红外通讯,PL2303没 提供RS232、RS485、RS422接口,PL2303没 编程不影响目标板的程序运行 为了便于网友自己DIY设计,所以附件内容很全面。 1.原理图和PCB源文件,用AD软件打开; 2.材料清单; 3.CH340驱动; 实物购买地址:https://item.taobao.com/item.htm?spm=a1z10.3-c.w4002-1517759554.9.eKDPdL&id=13133700432
2021-05-13 17:27:05 12.48MB ch340t usb转ttl串口 pl2302 电路方案
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ZYNQ_XC7Z020-484I1芯片原理图,需要参考的可以下载看看
2021-04-27 08:20:31 4.96MB ZYNQ
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倍福内部会员给出的ET1100的原理图,包括芯片的管脚定义,ET1100芯片外PHY芯片接线,E2ROM等,已经用于实际工程。
2021-04-14 17:00:02 1.75MB 硬件开发
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Linear LDO Linear Regulators 芯片 全系列原理图库+PCB封装库 2252个(AD集成库).IntLib后缀文件,拆分后文件为PcbLib+SchLib格式,Altium Designer原理图库+PCB封装库,集成库型号列表如下: Library Component Count : 2339 Name Description ---------------------------------------------------------------------------------------------------- LT1083CP#PBF 7.5 A Low Dropout Positive Regulator, 2.55 to 30 V Vin, Adjustable Vout, 3-pin FM (P-3), 0 to 150 degC, Pb-Free LT1083CP-12#PBF 7.5 A Low Dropout Positive Regulator, 6 to 25 V Vin, 12 V Vout, 3-pin FM (P-3), 0 to 150 degC, Pb-Free LT1083CP-5#PBF 7.5 A Low Dropout Positive Regulator, 6 to 25 V Vin, 5 V Vout, 3-pin FM (P-3), 0 to 150 degC, Pb-Free LT1084CP#PBF 5 A Low Dropout Positive Regulator, 2.55 to 30 V Vin, Adjustable Vout, 3-pin FM (P-3), 0 to 150 degC, Pb-Free LT1084CP-12#PBF 5 A Low Dropout Positive Regulator, 2.55 to 30 V Vin, 12 V Vout, 3-pin FM (P-3), 0 to 150 degC, Pb-Free LT1084CP-5#PBF 5 A Low Dropout Positive Regulator, 2.55 to 30 V Vin, 5 V Vout, 3-pin FM (P-3), 0 to 125 degC, Pb-Free LT1084CT 5 A Low Dropout Positive Regulator, 2.55 to 30 V Vin, Adjustable Vout, 3-pin FM (T-3), 0 to 150 degC LT1084CT#PBF 5 A Low Dropout Positive Regulator, 2.55 to 30 V Vin, Adjustable Vout, 3-pin FM (T-3), 0 to 150 degC, Pb-Free LT1084CT-12 5 A Low Dropout Positive Regulator, 2.55 to 30 V Vin, 12 V Vout, 3-pin FM (T-3), 0 to 150 degC LT1084CT-12#PBF 5 A Low Dropout Positive Regulator, 2.55 to 30 V Vin, 12 V Vout, 3-pin FM (T-3), 0 to 150 degC, Pb-Free LT1084CT-3.3 5 A Low Dropout Positive Regulator, 2.55 to 30 V Vin, 3.3 V Vout, 3-pin FM (T-3), 0 to 150 degC LT1084CT-3.3#PBF 5 A Low Dropout Positive Regulator, 2.55 to 30 V Vin, 3.3 V Vout, 3-pin FM (T-3), 0 to 150 degC, Pb-Free LT1084CT-5 5 A Low Dropout Positive Regulator, 2.55 to 30 V Vin, 5 V Vout, 3-pin FM (T-3), 0 to 150 degC LT1084CT-5#PBF 5 A Low Dropout Positive Regulator, 2.55 to 30 V Vin, 5 V Vout, 3-pin FM (T-3), 0 to
CS5216设计电路,CS5216原理图,DP转HDMI转接器设计参考电路
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74系列TTL芯片原理图封装库(AD库),包含74全系列,共100多个封装,基本包含了所有74系列原理图封装,是Altium Designer的SCH封装库,.SchLib格式的,非常实用,文件10.1M
2021-04-06 19:57:38 427KB 74系列 TTL芯片
数字电路CMOS&TTL74系列芯片ALTIUM库(AD原理图库),包括CMOS4000和TTL74 2个系列芯片全部型号原理图库文件,共896个 Library Component Count : 896 4020 14-Stage Ripple-Carry Binary Counter 4021 8-Stage Shift Register (Asynchronous Parallel Input or Synchronous Serial Input/Serial Output) 4022 Octal Counter with 8 Decoded Outputs 4023 Triple 3-Input NAND Gate 4024 7-Stage Ripple-Carry Binary Counter 4025 Triple 3-Input NOR Gate 4027 Dual J-K Master-Slave Flip-Flop 4028 BCD to Decimal Decoder 4029 Presettable Up/Down Counter Binary or BCD Decade 4030 Quad Exclusive-OR Gate 4031 64-Stage Static Shift Register 4035 4-Stage Parallel In/Parallel Out Shift Register 4040 12-Stage Ripple-Carry Binary Counter 4041 Quad True/Complement Buffer 4042 Quad Clocked D-Latch 4043 Quad 3-State R-S Latch 4044 Quad 3-State R-S Latch 4049 Inverting Hex Buffer / Converter 4050 Non-Inverting Hex Buffer/Conver 74F14 Hex Schmitt-Trigger Inverter 74F148 8-Line to 3-Line Priority Encoder 74F151 1 of 8 Data Selector/Multiplexer 74F151A 1 of 8 Data Selector/Multiplexer 74F153 Dual 4-Line to 1-Line Data Selector/Multiplexer 74F154 4-Line to 16-Line Decoder/Demultiplexer 74F157 Quad 2-Line to 1-Line Data Selector/Multiplexer 74F157A Quad 2-Line to 1-Line Data Selector/Multiplexer 74F158 Quad 2-Line to 1-Line Data Selector/Multiplexer 74F158A Quad 2-Line to 1-Line Data Selector/Multiplexer 74F160A Synchronous 4-Bit Decade Counter with Direct Clear 74F161A Synchronous 4-Bit Binary Counter with Direct Clear 74F162A Fully Synchronous 4-Bit Decade Counter 74F163A Fully Synchronous 4-Bit Bina
ILI2511触摸屏驱动芯片公板原理图+PCB布局参考,内含ALTIUM和PADS布局图
2021-04-02 15:56:07 1.1MB ILI251
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74系列TTL芯片ALTIUM库(AD原理图库).SchLib,包含74全系列芯片AD原理图封装,共800多个74系列原理图封装: 7406 Hex Inverter with Open-Collector High-Voltage Output 7407 Hex Buffer/Driver with Open-Collector High-Voltage Output 74147 10-Line to 4-Line Priority Encoder 74148 8-Line to 3-Line Priority Encoder 74199 8-Bit Shift Register 7425 Dual 4-Input NOR Gate with Strobe 7428 Quad 2-Input NOR Gate 7439 Quad 2-Input Positive-NAND Buffer with Open-Collector Output 7445 BCD-to-Decimal Decoder/Driver 74F00 Quad 2-Input Positive-NAND Gate 74F02 Quad 2-Input NOR Gate 74F04 Hex Inverter 74F06 Hex Inverter with Open-Collector High-Voltage Output 74F07 Hex Buffer/Driver with Open-Collector High-Voltage Output 74F08 Quad 2-Input Positive-AND Gate 74F10 Triple 3-Input Positive-NAND Gate 74F109 Dual J-~K Positive-Edge-Triggered Flip Flop with Preset and Clear 74F109X2 Dual J-~K Positive-Edge-Triggered Flip Flop with Preset and Clear 74F11 Triple 3-Input Positive-AND Gate 74F112 Dual J-K Negative-Edge-Triggered Flip-Flop with Clear and Preset 74F112X2 Dual J-K Negative-Edge-Triggered Flip-Flop with Clear and Preset 74F113 Dual J-K Negative-Edge-Triggered Flip-Flop with Preset 74F113X2 Dual J-K Negative-Edge-Triggered Flip-Flop with Preset 74F125 Quad Bus Buffer Gate with 3-State Output 74F125X4 Quad Bus Buffer Gate with 3-State Output 74F126 Quad Bus Buffer Gate with 3-State Output 74F126X4 Quad Bus Buffer Gate with 3-State Output 74F13 Dual 4-Input Positive-NAND Schmitt-Trigger 74F132 Quad Positive-NAND Gate with Schmitt-Trigger Input 74F133 13-Input Positive-NAND Gate 74F138 3-Line to 8-Line Decoder/Demult
STM32 F10x系列芯片原理图及封装集成库,包含常用f103系列全部芯片封装,如f103c8t6、f103rct6、f103zet6等,AD6.9等多个dxp版本可用。
2021-03-24 10:10:34 102KB stm32封装库 AD6.9
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