从学校图书馆外文期刊下的Verilog的国际标准。非常详细，是英文版的。

IEEE 802.3ad,非常难得的资料！快来分享吧！

IEEE电气和电子工程师协会_工程科学类的全部 关键词索引.pdf

IEEE Standard for System and Software Verification and Validation IEEE Std 1012-2012 Front Cover -14 Title Page -12 Notice to users -9 Laws and regulations -9 Copyrights -9 Updating of IEEE documents -9 Errata -9 Patents -8 Participants -7 Introduction -5 Contents -3 Important notice 1 1. Overview 1 1.1 Scope 1 1.2 Purpose 2 1.3 Field of application 3 1.4 V&V objectives 4 1.5 Organization of the standard 4 1.6 Audience 6 1.7 Conformance 7 1.8 Disclaimer 7 2. Normative references 7 3. Definitions, abbreviations, and acronyms 7 3.1 Definitions 7 3.2 Abbreviations and acronyms 11 4. Relationships between V&V and life cycle processes 12 5. Integrity levels 15 6. V&V processes overview 17 6.1 General 17 6.2 V&V testing 18 7. Common V&V activities 19 7.1 Activity: V&V Management 19 7.2 Activity: Acquisition Support V&V 20 7.3 Activity: Supply Planning V&V 21 7.4 Activity: Project Planning V&V 21 7.5 Activity: Configuration Management V&V 21 8. System V&V activities 33 8.1 Activity: Stakeholder Requirements Definition V&V 33 The purpose of the Stakeholder Requirements Definition Process is to define the requirements for a system that can provide the services needed by users and other stakeholders in a defined environment. It identifies stakeholders, or stakeholder classes... 33 The V&V effort shall perform, as specified in Table 2b for the selected integrity level, the following Stakeholder Requirements Definition V&V tasks described in Table 1b: 33 8.2 Activity: Requirements Analysis V&V 33 8.3 Activity: Architectural Design V&V 34 8.4 Activity: Implementation V&V 35 8.5 Activity: Integration V&V 35 8.6 Activity: Transition V&V 36 8.7 Activity: Operation V&V 36 8.8 Activity: Maintenance V&V 37 8.9 Activity: Disposal V&V 38 9. Software V&V activities 68 9.1 Activity: Software Concept V&V 68 9.2 Activity: Software Requirements V&V 68 9.3 Activity: Software Design V&V 69 9.4 Activity: Software Construction V&V 69 9.5 Activity: Software Integration Test V&V 70 9.6 Activity: Software Qualification Test V&V 70 9.7 Activity: Software Acceptance Test V&V 71 9.8 Activity: Software Installation and Checkout V&V 71 9.9 Activity: Software Operation V&V 72 9.10 Activity: Software Maintenance V&V 72 9.11 Activity: Software Disposal V&V 73 10. Hardware V&V activities 110 10.1 Activity: Hardware Concept V&V 110 10.2 Activity: Hardware Requirements V&V 110 10.3 Activity: Hardware Design V&V 111 10.4 Activity: Hardware Fabrication V&V 111 10.5 Activity: Hardware Integration Test V&V 112 10.6 Activity: Hardware Qualification Test V&V 112 10.7 Activity: Hardware Acceptance Test V&V 113 10.8 Activity: Hardware Transition V&V 113 10.9 Activity: Hardware Operation V&V 114 10.10 Activity: Hardware Maintenance V&V 114 10.11 Activity: Hardware Disposal V&V 115 11. V&V reporting, administrative, and documentation requirements 147 11.1 V&V reporting requirements 147 11.2 V&V administrative requirements 150 11.3 V&V documentation requirements 150 12. V&V plan outline 151 12.1 Overview 151 12.2 VVP Section 1: Purpose 152 12.3 VVP Section 2: Referenced documents 152 12.4 VVP Section 3: Definitions 152 12.5 VVP Section 4: V&V overview 152 12.5.1 VVP Section 4.1: Organization 152 12.5.2 VVP Section 4.2: Master schedule 153 12.5.3 VVP Section 4.3: Integrity level scheme 153 12.5.4 VVP Section 4.4: Resources summary 153 12.5.5 VVP Section 4.5: Responsibilities 153 12.5.6 VVP Section 4.6: Tools, techniques, and methods 153 12.6 VVP Section 5: V&V processes 154 12.6.1 VVP Section 5.1: Common V&V Processes, Activities, and Tasks 154 12.6.2 VVP Section 5.2: System V&V Processes, Activities, and Tasks 154 12.6.3 VVP Section 5.3: Software V&V Processes, Activities, and Tasks 154 12.6.4 VVP Section 5.4: Hardware V&V Processes, Activities, and Tasks 154 12.7 VVP Section 6: V&V reporting requirements 154 12.8 VVP Section 7: V&V administrative requirements 154 12.8.1 General 154 12.8.2 VVP Section 7.1: Anomaly resolution and reporting 154 12.8.3 VVP Section 7.2: Task iteration policy 154 12.8.4 VVP Section 7.3: Deviation policy 155 12.8.5 VVP Section 7.4: Control procedures 155 12.8.6 VVP Section 7.5: Standards, practices, and conventions 155 12.9 VVP Section 8: V&V test documentation requirements 155 Annex A (informative) Mapping of IEEE 1012 V&V activities and tasks 156 A.1 Mapping of ISO/IEC 15288 V&V requirements to IEEE 1012 V&V activities and tasks 156 A.2 Mapping of IEEE 1012 V&V activities to ISO/IEC 15288 system life cycle processes and activities 158 A.3 Mapping of ISO/IEC 12207 V&V requirements to IEEE 1012 V&V activities and tasks 159 A.4 Mapping of IEEE 1012 V&V activities to IEEE 12207 software life cycle processes and activities 161 Annex B (informative) A risk-based, integrity-level scheme 163 Annex C (informative) Definition of independent V&V (IV&V) 165 C.1 Technical independence 165 C.2 Managerial independence 165 C.3 Financial independence 165 C.4 Forms of independence 165 C.4.1 Classical IV&V 166 C.4.2 Modified IV&V 166 C.4.3 Integrated IV&V 166 C.4.4 Internal IV&V 166 C.4.5 Embedded V&V 167 Annex D (informative) V&V of reuse software 168 D.1 Purpose 168 D.2 V&V of software developed in a reuse process 169 D.2.1 V&V of assets in development 169 D.2.2 V&V of reused assets 169 D.3 V&V of software developed and reused outside of a reuse process 169 Annex E (informative) V&V measures 175 E.1 Introduction 175 E.2 Measures for evaluating anomaly density 175 E.3 Measures for evaluating V&V effectiveness 176 E.4 Measures for evaluating V&V efficiency 176 Annex F (informative) Example of V&V relationships to other project responsibilities 178 Annex G (informative) Optional V&V tasks 179 Annex H (informative) Environmental factors considerations 185 H.1 Introduction 185 H.2 In the agreement processes 185 H.3 In the organizational project-enabling processes 185 H.4 In the project processes 186 H.5 In the technical processes 186 Annex I (informative) V&V of system, software, and hardware integration 188 I.1 Introduction 188 I.2 Examples of system failures caused by integration issues 188 I.2.1 Year 2000 System Integration Issue 189 I.2.2 System architecture integration issues 189 I.3 System, software, and hardware interaction issues 190 Annex J (informative) Hazard, security, and risk analyses 193 J.1 Hazard analysis 193 Annex K (informative) Example of assigning and changing the system integrity level of “supporting system functions” 198 Annex L (informative) Mapping of ISO/IEC/IEEE 15288 and IEEE 12207 process outcomes to V&V tasks 200 Annex M (informative) Bibliography 209

通过深度强化学习的交通信号时间，IEEE最新文章 .打造交通信号控制的强化学习系统 如果把由信号机、检测器等组成的交通信号控制系统当成一个“智能体”，将我们目睹的人车路当成“环境”，通过如下方式就可以构造强化学习系统：传感器从环境里获取观测状态（例如：流量、速度、排队长度等），传递给信号机，信号控制系统根据这些状态来选择一个得分最高状态的动作来执行（例如：当前相位保持绿灯或者切换成红灯），并对执行效果进行回馈（例如：采用排队长度作为回报函数），系统根据回报结果，调整打分系统的参数。这样就形成一个循环的过程，就能达到不断学习改进。

1.随机输入数据生成2.符号映射3.16-QAM 调制4.ofdm信号产生

IEEE std 802.1D-1998英文版标准文档，主要讲述STP（生成树协议），IEEE std 802.1D-2004版本中STP内容已被RSTP代替，想了解STP内容的朋友必须看此文档

Book Description Learn how to harness the power of delta-sigma data converters Understanding Delta-Sigma Data Converters brings readers a clear understanding of the principles of delta-sigma (ΔΣ) converter operation—analog to digital and digital to analog. It introduces the best computer-aided analysis and design techniques available. With an understanding of the great versatility of the ΔΣ converter, readers can apply their new knowledge to a wide variety of applications, including digital telephony, digital audio, wireless and wired communications, medical electronics, and industrial and scientific instrumentation. The authors make the material accessible to all design engineers by focusing on developing an understanding of the physical operation rather than getting mired in complex mathematical treatments and derivations. Written for entry-level readers, the publication has a natural flow that begins with basic concepts, enabling the readers to develop a solid foundation for the book's more complex material. The text, therefore, starts with a general introduction to the ΔΣ converter, including a brief historical overview to place it in context. Next, the publication introduces the first-order ΔΣ modulator, covering oversampling, noise-shaping, decimation filtering and other key concepts. Then, using the first-order modulator as a foundation, second and higher-order modulators are presented and analyzed. Finally, the authors delve into implementation considerations and present several design examples using the Delta-Sigma Toolbox. Everything needed to facilitate quick comprehension and help readers apply their newly learned principles is provided: Simplified methods to understand complicated concepts such as spectral estimation and switched noise References that lead to in-depth analysis of specialized topics Figures and charts that illustrate complex design issues Conclusion section at the end of each chapter that highlights the key points Reference manual for the Delta-Sigma Toolbox, along with numerous practical examples that illustrate the use of the Toolbox This is essential reading for all design engineers who want to learn and fully harness the powerful capabilities of ΔΣ data converters. Upper-level undergraduates and graduate students will find the book's logical organization and clear style, coupled with numerous practical examples, a great entry into the field.

用于动态生成动态系统ID轨迹的SIDE-GAN-Pytorch代码。 这是在IEEE iROS2020中发表的论文“用于动态系统识别的信息轨迹的专业生成”的随附代码。 它能够快速生成多个循环动态系统识别轨迹，如下所示： 该体系结构属于生成对抗网络（GAN）的类别，可以归纳如下： 如果您想要简短的视频说明，请访问此链接： : 信用： 如果您打算将其中任何一种用于出版物，请引用 “动力学系统识别的信息轨迹的专家生成”，M。Jegorova，J。Smith，M。Mistry和T. Hospedales，2020年IEEE / RSJ智能机器人和系统国际会议（IROS）。 机器人，模拟器，训练数据和其他特定于代码的详细信息： 运行此代码的先决条件如下： python >=3.5.3 pytorch >= 1.3.0 numpy >= 1.13.3

用VB编写modbus的一个通讯程序代码，带十六进制浮点转换