T11.2 / Project 1316-DT/ Rev 12.2 January 30, 2004
2021-11-27 17:40:11 3.11MB jitter
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用法: 抖动 = Pn2Jitter(f, Lf, fc) 输入: f:频率矢量(相位噪声断点),以Hz为单位,行或列。 Lf:相位噪声矢量,单位为 dBc/Hz,与 f 相同的维度、大小()。 fc:载波频率,以Hz为单位。 输出: 抖动:RMS 抖动,以秒为单位。 相位噪声数据可以来自图形信息或实际测量数据。 注释标题文档提供了多个使用示例,并与应用笔记、网站、Excel 工作表和专用相位噪声实验室测量设备中提供的其他相位噪声抖动计算器进行比较。 例子: >> f = [10^0 10^1 10^3 10^4 10^6]; Lf = [-39 -73 -122 -131 -149]; >> 抖动 = Pn2Jitter(f, Lf, 70e6) 抖动 = 2.3320e-011 给出了相同数据集计算的其他四个示例,范围从 21.135 到 24.56ps。 更多数据集示例
2021-09-29 17:18:25 4KB matlab
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锁相环的相位噪声和抖动的评估,适用于对锁相环系统有一定的理解,需要评估系统的噪声是否满足一定的指标。
2021-08-18 09:44:39 713KB PLL PHASE NOISE JITTER
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USB 3.2 ENGINEERING CHANGE NOTICE Bit-level re-timers which use the recovered clock from the input data stream as the input clock for the transmitter can pass on low frequency jitter, which can in turn result in accumulation of excessive low frequency jitter in systems with cascaded bit -level Retimers. Current JTF Jitter Gain limit was chosen analytically, empirical results of early Retimers implementations show a higher realistic jitter gain below 500kHz with no impact on Jitter tolerance requirements contained in Section 6.8.5. This ECN changes the Max. Limit of JTF Jitter Gain parameter.
2021-08-15 13:12:23 215KB usb 资源达人分享计划
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Understanding Jitter in System---PCI SIG PPT
2021-04-29 01:40:52 1.75MB pci-e
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PCI Express 1.1 Electricals and Jitter Considerations---PCI SIG PPT
2021-04-29 01:40:52 553KB pci-e
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Jitter_Measurements--- PCI SIG PPT
2021-04-29 01:40:52 1.85MB pci-e
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A Network Delay Jitter Smoothing Algorithm in Cyber-Physical Systems
2021-02-22 09:07:48 449KB 研究论文
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A new delay jitter smoothing algorithm based on Pareto distribution in Cyber-Physical Systems
2021-02-22 09:07:46 922KB 研究论文
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