基于cyclone2 fpga的任意波形发生器VHDL设计QUARTUS工程文件+文档说明: library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_unsigned.all; use IEEE.std_logic_arith.all; entity DDS_top is port ( clk:in std_logic; --内部时钟 reset:in std_logic; --复位信号 key5 sclk:out std_logic; --TLC5615 sclk时钟脚 din:out std_logic; --TLC5615 din数据脚 cs:out std_logic; --TLC5615 cs片选 set_waveform_key_in:in std_logic; --波形设置按键 key1 set_f_key_in:in std_logic; --频率设置按键 key2 set_a_key_in:in std_logic; --幅值设置按键 key3 set_p_key_in:in std_logic; --相位设置按键 key4 sin_data:out std_logic_vector(9 downto 0) --输出的波形数据,用于测试 ); end DDS_top; architecture behave of DDS_top is signal set_waveform_line:std_logic_vector(1 downto 0); signal f_control_line:std_logic_vector(20 downto 0); signal a_control_line:std_logic_vector(3 downto 0); signal p_control_line:std_logic_vector(9 downto 0); signal dds_data_out_temp:std_logic_vector(9 downto 0); signal set_waveform_key:std_logic; signal set_f_key:std_logic; signal set_a_key:std_logic; signal set_p_key:std_logic; --DDs模块 component DDS is port( clk:in std_logic;--时钟输入 dds_data_out:out std_logic_vector(9 downto 0);--DDS数据输出 set_waveform:in std_logic_vector(1 downto 0);--设置输出的波形 set_f:in std_logic_vector(20 downto 0);--设置频率 set_a:in std_logic_vector(3 downto 0);--设置幅值 set_p:in std_logic_vector(9 downto 0)--设置频率 ); end component; -- DAC驱动模块 component TLC5615 is port( CLK:IN STD_LOGIC; SCLK:OUT STD_LOGIC; DIN:OUT STD_LOGIC; CS:OUT STD_LOGIC; DATA_IN:IN STD_LOGIC_VECTOR(9 DOWNTO 0) ); end component; -- 按键消抖模块 component key is port( clk:in std_logic; key:in std_logic; key_out:out std_logic ); end component; -- 按键编码模块 component key_coding i
quartus安装破解的好伙伴
2021-11-24 13:57:51 1.11MB quartus altera
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该文档详细给出了在QUARTUS II中生存MIF文档以初始化rom的方法
2021-11-23 10:29:03 31KB quartus II MIF
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好东西!网上的安装破解流程很垃圾,而且还很误导别人,这是我根据自己的安装破解流程总结出来的。
2021-11-22 22:29:41 291KB Quartus II 9.0安装破解
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Run the application setup, select the (Paid) edition of Quartus II . Wait for it, or take a lunch break... When asked for a license, cancel the dialog box. Unzip the crack into the install dir e.g. \altera\11.1\ and overwrite folders/files. Run the LicenseMaker.exe from the install dir with administrator privilege. It will create a license.dat and set the required system environment variables LM_LICENSE_FILE and MGLS_LICENSE_FILE which point to the location of the license.dat Launch the program. When asked for the license, select the option to specify valid license file, and "Use LM_LICENSE_FILE variable" (or browse to the license.dat) You can do the same procedure (or verify the license status) from the program by going to the "Tools", "License Setup". Enjoy.
2021-11-22 11:30:58 2.07MB Quartus Altera
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Quartus II 10.0 破解 --------------------- 测试通过 2010.9
2021-11-22 10:30:42 1.65MB Quartus II 10.0 破解
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基于FPGA的数据选择器 适合VHDL初学者 内涵数据选择器详细内容
2021-11-20 14:49:22 190KB 数据 选择器 FPGA QUARTUS
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quartus17.0下载地址+破解 所有插件下载地址+软件的破解方法 实用有效!
2021-11-19 16:15:18 185KB Quartus
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EDA数字钟硬件实验VHDL代码
2021-11-19 09:04:50 1.43MB quartus EDA
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Quartus_12.1破解器
2021-11-15 16:04:46 30KB Quartus 破解器
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